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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳景然 | zh_TW |
| dc.contributor.advisor | Ching-Jan Chen | en |
| dc.contributor.author | 林原郅 | zh_TW |
| dc.contributor.author | Yuan-Chih Lin | en |
| dc.date.accessioned | 2024-03-04T16:24:20Z | - |
| dc.date.available | 2024-03-05 | - |
| dc.date.copyright | 2024-03-04 | - |
| dc.date.issued | 2024 | - |
| dc.date.submitted | 2024-02-05 | - |
| dc.identifier.citation | [1] Ernest Orlando Lawrence Berkeley National Laboratory. “United States Data Center Energy Usage Report,” June 2016.
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Moon, “LLC resonant converter with adaptive link-voltage variation for a high-power-density adapter,” IEEE Trans. Power Electron., vol. 25, no. 9, pp. 2248–2252, Sept. 2010. [12] S. Hu, J. Deng, C. Mi, and M. Zhang, “LLC resonant converters for PHEV battery chargers,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Long Beach, CA, USA, Mar. 2013, pp. 3051–3054. [13] H. Wu, T. Mu, X. Gao, and Y. Xing, “A secondary-side phase-shift-controlled LLC resonant converter with reduced conduction loss at normal operation for hold-up time compensation application,” IEEE Trans. Power Electron., vol. 30, no. 10, pp. 5352–5357, Oct. 2015. [14] R. D’Cruz and M. Rajesh, “Half bridge LLC resonant DC-DC converter for solar array simulator application,” in Proc. Int. Conf. Tech. Adv. Power Energy (TAP Energy), Kollam, India, Jun. 2015, pp. 138–143. [15] R. Yang, “A half-bridge LLC resonant converter with loose-coupling transformer and transition capacitor,” in Proc. IEEE Conf. Ind. Electron. Appl., Hangzhou, China, Jun. 2014, pp. 1344–1349. [16] Y. Huang, Y. Hsieh, Y. Lin, H. Chiu, and J. Lin, “Study and implementation on start-up control of full-bridge LLC resonant converter,” in Proc. IEEE Transport. Electrific. Conf. Expo., Asia-Pacific (ITEC Asia-Pacific), Bangkok, Thailand, Jun. 2018. [17] R. Lin and C. Lin, “Design criteria for resonant tank of LLC DC-DC resonant converter,” in Proc. IEEE Conf. Ind. Electron. (IECON), Glendale, AZ, USA, Nov. 2010, pp. 427–432. [18] M. Sato, S. Nagaoka, T. Uematsu, and T. Zaitsu, “Mechanism of current imbalance in LLC resonant converter with center tapped transformer,” in Proc. IEEE Int. Power Electron. Conf. (IPEC-Niigata 2018-ECCE Asia), Niigata, Japan, May 2018, pp. 118–122. [19] J. Jung, “Bifilar winding of a center-tapped transformer including integrated resonant inductance for LLC resonant converters,” IEEE Trans. Power Electron., vol. 28, no. 2, pp. 615–620, Feb. 2013. [20] M. Li, Q. Chen, X. Ren, Y. Zhang, K. Jin, and B. Chen, “The integrated LLC resonant converter using center-tapped transformer for on-board EV charger,” in Proc. IEEE Energy Convers. Congr. Expo. (ECCE), Montreal, QC, Canada, Sept. 2015, pp. 6293–6298. Duty control [21] M. H. Ahmed, F. C. Lee, and Q. Li, “Two-stage 48-V VRM with intermediate bus voltage optimization for data centers,” IEEE Trans. Emerg. Sel. Topics Power Electron., vol. 9, no. 1, pp. 702–715, Feb. 2021. [22] Y. Panov, M. Jovanović, and B. Irving, “Novel transformer-flux-balancing control of dual-active-bridge bidirectional converters,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Charlotte, NC, USA, Mar. 2015, pp. 42–49. [23] P. Rehlaender, O. Wallscheid, F. Schafmeister, and J. Böcker, “LLC resonant converter modulations for reduced junction temperatures in half bridge mode and transformer flux in the on-the-fly morphing thereto,” IEEE Trans. Power Electron., vol. 37, no. 11, pp. 13413–13427, Nov. 2022. [24] Phase-Shifted Full Bridge DC/DC Power Converter Design Guide, Texas Instrument, Dallas, TX, USA, 2014, Application note. [25] STPS10L60 60 V power Schottky rectifier, STMicroelectronics, Geneva, Switzerland, 2018, Datasheet. [26] S. Simone, C. Adragna, and C. Spini, “Design guideline for magnetic integration in LLC resonant converters,” in Proc. Int. Sym. Power Electron., Electrical Drives, Auto. Motion (SPEEDAM), Ischia, Italy, Jun. 2008, pp. 950–957. [27] H. Huang, “FHA-based voltage gain function with harmonic compensation for LLC resonant converter,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Palm Springs, CA, USA, Feb. 2010, pp. 1770–1777. [28] Y. Murakami, T. Sato, K. Nishijima, and T. Nabeshima, “Small signal analysis of LLC current resonant converters using equivalent source model,” in Proc. IEEE Conf. Ind. Electron. (IECON), Florence, Italy, Oct. 2016, pp. 1417–1422. [29] S. Tian, F. Lee, and Q. Li, “A simplified equivalent circuit model of series resonant converter,” IEEE Trans. Power Electron., vol. 31, no. 5, pp. 3922–3931, May. 2016. [30] S. Tian, F. Lee, and Q. Li, “Equivalent circuit modeling of LLC resonant converter,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Long Beach, CA, USA, Mar. 2016, pp. 1608–1615. [31] Z. Fang, J. Wang, S. Duan, L. Xiao, G. Hu, and Q. Liu, “Rectifier current control for an LLC resonant converter based on a simplified linearized model,” Energies, vol. 11, no. 3, 579:1–14, Feb. 2018. [32] MATLAB. System Identification Overview. Available online: https://www.mathworks.com/help/ident/gs/about-system-identification.html (accessed on 30 May, 2019). [33] MATLAB. System Identification Toolbox. Available online: https://www.mathworks.com/products/sysid.html (accessed on 30 May, 2019). [34] L. Corradini, D. Maksimovic, P. Mattavelli, and R. Zane, Digital Control of High-Frequency Switched-Mode Power Converters. Hoboken, NJ, USA: Wiley, 2015, pp. 51–78. [35] TMS320x2802x, 2803x Piccolo Enhanced Pulse Width Modulator (ePWM) Module, Texas Instruments, Dallas, TX, USA, 2011, Reference Guide. [36] TMS320x2802x, 2803x Piccolo Analog-to-Digital Converter (ADC) and Comparator, Texas Instruments, Dallas, TX, USA, 2011, Reference Guide. [37] A.V. Peterchev and S.R. Sanders, “Quantization resolution and limit cycling in digitally controlled PWM converters,” IEEE Trans. Power Electron., vol. 18, no. 1, pp. 301–308, Jan 2003. [38] S. Chattopadhyay, “Analysis of limit cycle oscillations in digital current-mode control,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Dallas, TX, USA, Mar. 2006, pp. 480–486. [39] H. Peng, A. Prodic, E. Alarcon, and D. Maksimovic, “Modeling of quantization effects in digitally controlled DC–DC converters,” IEEE Trans. Power Electron., vol. 22, no. 1, pp. 208–215, Jan 2007. [40] S. Dashmiz, B. Mahdavikhah, A. Prodic, and B. McDonald, “Resolution requirements to avoid limit cycling in LLC resonant converter,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Long Beach, CA, USA, Mar. 2017, pp. 3297–3301. [41] S. Pidaparthy, J. Jang, and B. Choi, “Push–pull mode digital control for LLC series resonant dc-to-dc converters,” IET Power Electron., vol. 8, no. 11, pp. 2115–2124, May 2015. [42] 孫宗瀛(民89)。TMS320C5x DSP原理設計與應用。臺北市：全華。 [43] Y. C. Lin, “Digital power supplies control,” AcBel Corp., New Taipei City, TW, Internal Training Course Handouts, Jan. 2015. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/92076 | - |
| dc.description.abstract | LLC諧振轉換器由於具有初級側零電壓切換(zero-voltage-switching, ZVS)、次級側零電流切換(zero-current-switching, ZCS)、以及寬廣輸入範圍操作等操作特性，因此廣泛被用於資料中心、運算伺服器、儲存設備等應用，以滿足高效率與高功率密度之需求。同時，具有變壓器中心抽頭整流架構之LLC諧振轉換器，由於具有最少的整流元件數，在低電壓高電流的應用中，能夠減低整流元件產生的功率損失。然而，在硬體電路實現中，由於次級側整流迴路的電路雜散參數不相等，可能導致變壓器產生磁通偏移(flux walking)現象，使得變壓器可能進入磁通飽和狀態，同時也會造成次級側整流元件的功率損失不平衡，進而導致功率損失較大的整流元件容易損壞。針對此問題，本論文提出了一種磁通平衡控制策略，以改善磁通偏移問題。
本論文提出的控制架構是基於電壓模式控制架構，其中電壓控制迴路通過控制開關頻率以實現輸出電壓調整。在這個架構中，引入了磁通平衡控制迴路，通過調整初級側開關元件的責任週期，作為激磁電流直流成分的控制變數。由於LLC諧振轉換器的激磁電流無法直接感測，因此本論文提出了一種利用次級側整流二極體電流的感測方法，並通過數位化的取樣和估測機制間接獲得激磁電流的直流成分。此外，本論文亦針對次級側電路雜散參數的不對稱性對激磁電流的影響進行了數學分析，並推導出描述激磁電流直流成分與次級側電路雜散參數不對稱性之間關聯性的方程式。同時，根據這些結果，加入初級側責任週期控制變數，以調整激磁電流直流成分為零的目標，並推導出在考慮次級側電路雜散參數不對稱性的條件下所需的責任週期修正量。 此外，本論文也針對所提出的控制架構進行了控制迴路分析，定義相關的開迴路增益，以便於分析和控制器設計。本論文所提出之控制架構硬體實現是基於低成本之定點運算數位信號處理器(digital-signal-processor, DSP)，因此，針對數位實現之相關議題，也一併在本論文中探討。最後，本論文分別使用電路模擬軟體PSIM建立整體數位控制模擬平台，同時建構硬體實驗環境，以輸入電壓380 V、輸出電壓20 V、輸出額定功率200 W為電路規格，藉由模擬與實驗相互驗證所提出控制方法有效性與可行性。 | zh_TW |
| dc.description.abstract | LLC resonant converters are widely used in applications such as data centers, cloud computing servers, and storage equipment due to their characteristics, including zero-voltage-switching (ZVS) on primary-side, zero-current-switching (ZCS) on secondary-side, and a wide input voltage range. These features make them suitable for meeting the demands of high efficiency and high-power density. Additionally, LLC resonant converters with a transformer center-tapped rectifier architecture have the advantage of requiring fewer rectification components, reducing power losses in applications with low voltage and high current requirements. However, in practical hardware implementations, the asymmetry in the parasitic parameters of the two secondary-side rectification loops can lead to magnetic flux imbalance (flux walking) in the transformer. This phenomenon may cause the transformer to enter a state of magnetic saturation and result in uneven power losses among the secondary-side rectification components. Consequently, rectification components with higher power losses are more susceptible to damage. To address this issue, this dissertation proposes a flux balance control strategy to mitigate the effects of flux imbalance.
The control architecture proposed in this dissertation is based on a voltage-mode control framework, where the voltage control loop adjusts the output voltage by controlling the switching frequency. In this framework, a flux balance control loop is introduced, regulating the duty ratio of the primary-side switching elements as a control variable for the DC magnetizing current. Since the magnetizing current in LLC resonant converters cannot be directly sensed, this dissertation also presents a method of indirectly obtaining the DC magnetizing current using secondary-side rectification diode currents and digital sampling and estimation mechanisms. Furthermore, this dissertation conducts mathematical analysis of the impact of asymmetrical parasitic parameters in the secondary-side circuit on the magnetizing current. It derives equations that describe the relationship between the DC magnetizing current and the asymmetry in the secondary-side parasitic parameters. Based on these findings, a modification to the duty ratio is proposed to achieve the goal of the zero DC magnetizing current while considering the asymmetry in the secondary-side parasitic parameters. In addition, this dissertation also conducted control loop analysis for the proposed control architecture, defining relevant open-loop gains for analysis and controller design. The hardware implementation of the proposed control architecture is based on a low-cost fixed-point digital signal processor (DSP). Therefore, related issues regarding digital implementation are also discussed in this thesis. Finally, this dissertation establishes an integrated digital control simulation platform using circuit simulation software PSIM and constructs a hardware experimental environment. The circuit specifications are set at an input voltage of 380 V, an output voltage of 20 V, and a rated output power of 200 W. The effectiveness and feasibility of the proposed control methods are verified through mutual validation between simulation and experimentation. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-03-04T16:24:20Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2024-03-04T16:24:20Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 論文口試委員審定書 i
致謝 ii 中文摘要 iii Abstract v Table of Contents vii List of Figures xi List of Tables xix Chapter 1. Introduction 1 1.1 Research Background and Motivation 1 1.2 Literature Review 8 1.2 Research Objective 12 1.3 Dissertation Organizations 14 Chapter 2. Analysis of the Flux Imbalance of the LLC Resonant Converters 16 2.1 The Relationship between the Magnetizing Current and the Rectified Diode Currents 16 2.2 The Magnitude the Rectified Diode Current in Symmetrical Parasitic Parameters Condition 18 2.2.1 Description of Assumption Conditions 18 2.2.2 The Magnitude of the Rectified Diode Current 20 2.3 The DC Rectified Diode Currents Considering Asymmetrical Parasitic Parameters Conditions 23 2.3.1 The DC Rectified Diode Current during the Positive Half-Period Operation 23 2.3.2 The DC Rectified Diode Current during the Negative Half-Period Operation 25 2.4 The Asymmetrical Parasitic Parameters Effects 27 2.4.1 The Asymmetrical Rectified Diode Forward Voltage Drops 27 2.4.2 The Asymmetrical Secondary-Side Leakage Inductances 30 2.5 Derivation of The Imbalanced DC Magnetizing Current (Method 1) 37 2.5.1 The General Form of the DC Magnetizing Current 37 2.5.2 Adding the Asymmetrical Rectified Diode Forward Voltage Drops Consideration 38 2.5.3 Adding the Asymmetrical Secondary-Side Leakage Inductances Consideration 40 2.6 Derivation of the Imbalanced DC Magnetizing Current (Method 2) 41 2.6.1 The General Form of the DC Magnetizing Current 42 2.6.2 Adding the Asymmetrical Rectified Diode Forward Voltage Drops Consideration 44 2.6.3 Adding the Asymmetrical Secondary-Side Leakage Inductances Consideration 47 2.7 Summary 49 Chapter 3. The Flux Imbalance Improvement based on the Asymmetrical Duty Ratio 50 3.1 Description of the Objective for the Imbalanced DC Magnetizing Current Improvement 50 3.2 Effect of the Asymmetrical Duty Ratio 51 3.2.1 The Magnetizing Current 51 3.2.2 The Resonant Current and the Rectified Diode Currents 54 3.3 The DC Magnetizing Current with the Asymmetrical Duty Ratio 57 3.3.1 The General Form of the DC Magnetizing Current 57 3.3.2 Adding the Asymmetrical Rectified Diode Forward Voltage Drops Consideration 59 3.3.3 Adding the Asymmetrical Secondary-Side Leakage Inductances Consideration 64 3.4 Summary 68 Chapter 4. Analysis and Design of the Proposed Control Loop 69 4.1 Description and Analysis of the Proposed Control Loop 69 4.2 Analysis of the Open Loop Gain 75 4.2.1 Considering AC Sweep Perturbation in the Output Voltage Loop 76 4.2.2 Considering AC Sweep Perturbation in the Flux Balance Loop 80 4.3 Characteristics Analysis of Frequency Response of the Controlled Plants 84 4.3.1 Introduction of the System Identification Tool of MATLAB 84 4.3.2 Small-Signal Frequency Responses of the Controlled Plants 85 4.4 Analysis of the Delay Effects 94 4.4.1 Effect of the Sample and Hold Delay 95 4.4.2 Effect of the Calculation Delay 97 4.5 Controller Design 100 4.6.1 The Output Voltage Loop Controller Design 100 4.6.2 The Flux Balance Loop Controller Design 104 4.6 Summary 107 Chapter 5. DSP based Digitalized Controller Implementation Issues 109 5.1 The Sampling Timing based on the Digital-Asymmetrical-Pulse-Width-Modulator (DAPWM) 109 5.2 Digitalized Controller Execution Timing 110 5.2.1 Execution Timing Method 1 110 5.2.2 Execution Timing Method 2 113 5.3 Feedback Circuits Design 114 5.3.1 The Output Voltage Feedback Circuit Design 115 5.3.2 The Difference Diode Current Feedback Circuit Design 119 5.4 Observable Resolution of ADC 125 5.4.1 ADC for the Output Voltage Feedback 125 5.4.2 ADC for the Difference Diode Current Feedback 127 5.5 Controllable Resolution of DAPWM 129 5.6 Estimation of the DC Magnetizing Current 130 5.7 Digitalized Controller Numerical Processing Description 132 5.7.1 The Feedback Signals Numerical Processing 132 5.7.2 The Digitalized Controllers Numerical Processing 135 5.7.3 The DAPWM Numerical Processing 139 5.8 Summary 141 Chapter 6. Simulation and Experimental Verification 142 6.1 Establishing the Simulation and Experimental Platforms 142 6.1.1 Simulation Platform 142 6.2.2 Laboratory Platform 143 6.2 Simulation and Experimental Results 148 6.2.1 Steady-State Response 148 6.2.2 Transient Response 166 6.2.3 Loss and Efficiency 178 Chapter 7. Conclusions and Future Works 181 7.1 Conclusions 181 7.2 Future Works 183 References 186 Vita 190 | - |
| dc.language.iso | en | - |
| dc.subject | LLC諧振轉換器 | zh_TW |
| dc.subject | 中心抽頭變壓器 | zh_TW |
| dc.subject | 磁通偏移 | zh_TW |
| dc.subject | 非對稱雜散參數 | zh_TW |
| dc.subject | 磁通平衡控制迴路 | zh_TW |
| dc.subject | 激磁電流直流成分估測 | zh_TW |
| dc.subject | 控制器數位實現 | zh_TW |
| dc.subject | controller digital implementation | en |
| dc.subject | asymmetrical parasitic parameters | en |
| dc.subject | flux balance control loop | en |
| dc.subject | DC magnetizing current estimation | en |
| dc.subject | LLC resonant converter | en |
| dc.subject | center-tapped transformer | en |
| dc.subject | flux walking | en |
| dc.title | 使用數位控制技術之LLC諧振轉換器磁通不平衡分析與改善之研究 | zh_TW |
| dc.title | Research on Analysis and Improvement of the Flux Imbalance of LLC Resonant Converters Using Digital Control Techniques | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 112-1 | - |
| dc.description.degree | 博士 | - |
| dc.contributor.oralexamcommittee | 陳耀銘;邱煌仁;楊士進;陳鴻祺 | zh_TW |
| dc.contributor.oralexamcommittee | Yaow-Ming Chen;Huang-Jen Chiu;Shih-Chin Yang;Hung-Chi Chen | en |
| dc.subject.keyword | LLC諧振轉換器,中心抽頭變壓器,磁通偏移,非對稱雜散參數,磁通平衡控制迴路,激磁電流直流成分估測,控制器數位實現, | zh_TW |
| dc.subject.keyword | LLC resonant converter,center-tapped transformer,flux walking,asymmetrical parasitic parameters,flux balance control loop,DC magnetizing current estimation,controller digital implementation, | en |
| dc.relation.page | 191 | - |
| dc.identifier.doi | 10.6342/NTU202400426 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2024-02-15 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電機工程學系 | - |
| dc.date.embargo-lift | 2029-02-05 | - |
| 顯示於系所單位： | 電機工程學系 | |
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