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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/91682完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 李峻霣 | zh_TW |
| dc.contributor.advisor | Jiun-Yun Li | en |
| dc.contributor.author | 廖宸嶢 | zh_TW |
| dc.contributor.author | Chen-Yao Liao | en |
| dc.date.accessioned | 2024-02-22T16:12:52Z | - |
| dc.date.available | 2024-02-23 | - |
| dc.date.copyright | 2024-02-22 | - |
| dc.date.issued | 2024 | - |
| dc.date.submitted | 2024-02-02 | - |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/91682 | - |
| dc.description.abstract | 由於較長的相干時間與VLSI相容性，量子點是一個可依靠作為量子運算的平台。本論文中，分別於非摻雜式矽/矽鍺與鍺/鍺矽，實現量子霍爾效應與庫倫阻斷等量子傳輸現象。另外，由於量子點製程複雜，為減少閘極層數，離子佈植隔離技術被提出，並以金氧半場效電晶體作為測試平台。
非摻雜式矽/矽鍺的傳輸現象以電子密度與遷移率為表徵討論，且觀察到整數與分數量子霍爾效應。對於非摻雜式鍺/鍺矽而言，以一手指式量子點量測傳輸現象與庫倫阻斷。庫倫阻斷的巔峰之間距離較理論值大二個數量級，其中原因可能為較小的等效量子點面積。 透過離子佈植，量子點的閘極數得以減少。離子佈植定義電晶體以離子佈植而非閘極定義通道區域。對於矽金氧半場效電晶體而言，4 K量測結果顯示離子佈植區域絕緣。低溫下，即使離子佈植區域上方有閘極，仍未有載子被引誘出。這些結果顯示金氧半場效電晶體的通道區域可以被離子佈植定義，也因此，離子佈植未來有被應用於減低量子點複雜度的潛力。 | zh_TW |
| dc.description.abstract | Semiconductor quantum dots (QDs) are a promising platform for quantum computing due to the long coherence time and VLSI compatibility. In this thesis, quantum transport properties, such as quantum Hall effect and Coulomb blockade, in undoped Si/SiGe and Ge/GeSi heterostructures are investigated. In addition, since the device fabrication of QDs requires complicated processing steps, to reduce the number of gate layers, ion implant isolation is proposed and characterized using MOSFETs as a test platform.
The transport properties of undoped Si/SiGe are characterized by the electron density and mobility. Both integer and fractional quantum Hall effect are observed. For the undoped Ge/GeSi heterostructure, a finger-like quantum dot is characterized by both gate control test and Coulomb blockade measurement. The distance between Coulomb peaks is two orders larger than the theoretical one, which might be attributed to smaller effective quantum dot size. The number of the gates used for QDs can be reduced by using an implant step to create amorphous layers for electrical isolation. Implant-isolated MOSFETs are investigated by using the implant step to define the channel areas rather than the top gate. For Si MOSFETs, measurement results at 4 K show that the implanted regions are electrically insulating. Even there exist gates on top of the implanted region, there is no carrier induced at cryogenic temperatures. These results suggest that the channel area of MOSFETs can be defined by ion implantation, and this ion-implant isolation technique has great potential for reducing the complexity of QD fabrication in the future. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-02-22T16:12:52Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2024-02-22T16:12:52Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 摘要 ii Abstract iii 目次 iv 圖次 vi 表次 xii 第 1 章 引言 1 1.1 量子電腦 1 1.1.1 引言 1 1.1.2 量子邏輯閘與讀出 2 1.1.3 量子電腦結構 2 1.1.4 量子位元平台 4 1.2 半導體量子位元 4 1.2.1 以量子點實現量子位元 4 1.2.2 量子點最新研究成果回顧 8 1.3 多重閘極製程 10 1.4 論文架構 12 第 2 章 矽/矽鍺異質結構霍爾棒元件 13 2.1 霍爾效應 13 2.1.1 整數量子霍爾效應 14 2.1.2 分數量子霍爾效應 15 2.2 矽/矽鍺異質結構 17 2.3 矽/矽鍺異質結構霍爾棒元件製作 20 2.4 矽/矽鍺異質結構之電子磁阻特性 23 2.4.1 低磁場(<0.5 T)實驗結果 23 2.4.2 高磁場(最高至8 T)實驗結果 25 2.5 結論 27 第 3 章 量子點元件 28 3.1 量子點介紹與結構 28 3.2 量子點基本物理與傳輸特性 30 3.2.1 單量子點基本物理與傳輸特性 30 3.2.2 雙量子點基本物理與傳輸特性 33 3.2.3 電荷偵測器 35 3.3 矽量子點製作與特性分析 37 3.4 鍺/鍺矽量子點製作與特性分析 42 3.5 結論 48 第 4 章 離子佈植隔離技術 50 4.1 離子佈植隔離應用 50 4.2 利用離子佈植隔離製作之矽金氧半電晶體 53 4.2.1 元件製程 53 4.2.2 離子佈植隔離區域電性測試 55 4.2.3 離子佈植定義電晶體 60 4.3 離子佈植隔離於非摻雜式矽/矽鍺材料電性實驗 71 4.3.1 元件製程 71 4.3.2 離子佈植隔離區域電性測試 74 4.3.3 離子佈植定義電晶體 74 4.4 結論 78 第 5 章 結論與未來工作 80 5.1 結論 80 5.2 未來工作 80 參考文獻 81 | - |
| dc.language.iso | zh_TW | - |
| dc.subject | 量子霍爾效應 | zh_TW |
| dc.subject | 量子點 | zh_TW |
| dc.subject | 低溫 | zh_TW |
| dc.subject | 離子佈植隔離 | zh_TW |
| dc.subject | 庫倫阻斷 | zh_TW |
| dc.subject | Coulomb Blockade | en |
| dc.subject | Ion-Implant Isolation | en |
| dc.subject | Cryogenic | en |
| dc.subject | Quantum Hall Effect | en |
| dc.subject | Quantum Dot | en |
| dc.title | 離子佈植隔離技術應用於低溫金氧半與量子元件 | zh_TW |
| dc.title | Ion Implant Isolation for Cryo-CMOS and Quantum Devices | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 112-1 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 李敏鴻;卓大鈞 | zh_TW |
| dc.contributor.oralexamcommittee | Min-Hung Lee;Ta-Chun Cho | en |
| dc.subject.keyword | 量子點,量子霍爾效應,庫倫阻斷,離子佈植隔離,低溫, | zh_TW |
| dc.subject.keyword | Quantum Dot,Quantum Hall Effect,Coulomb Blockade,Ion-Implant Isolation,Cryogenic, | en |
| dc.relation.page | 91 | - |
| dc.identifier.doi | 10.6342/NTU202400357 | - |
| dc.rights.note | 同意授權(全球公開) | - |
| dc.date.accepted | 2024-02-05 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電子工程學研究所 | - |
| 顯示於系所單位： | 電子工程學研究所 | |
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| ntu-112-1.pdf | 4.99 MB | Adobe PDF | 檢視/開啟 |
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