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標題: | 以鉍/金為電極之二維二硫化鎢電晶體研究 The Study of 2D Tungsten Disulfide Field-Effect Transistors with Bi/Au Contacts |
作者: | 郭庭維 Ting-Wei Kuo |
指導教授: | 陳奕君 I-Chun Cheng |
關鍵字: | 過渡金屬硫化物,二硫化鎢,六方晶氮化硼,鉍金接觸,二硫化鎢電晶體,霍爾量測, transition metal dichalcogenides (TMDCs),tungsten disulfide (WS2),WS2 field-effect transistors,bismuth/gold contacts,hexagonal boron nitride (hBN),Hall measurement, |
出版年 : | 2023 |
學位: | 碩士 |
摘要: | 過渡金屬硫化物( transition metal dichalcogenides, TMDCs) 擁有原子級的厚薄度,高載子遷移率,和可調能隙 ( tunable bandgap ) 等諸多優秀性質;而在TMDCs之中,二硫化鎢 ( tungsten disulfide, WS2 ) 具有較寬的能隙,以及理論預期最高的載子遷移率,深具應用於下一世代電子元件的潛力。
本研究透過膠帶層離法 ( tape exfoliation ) 製備二硫化鎢與六方晶氮化硼 ( hexagonal boron nitride, hBN ) 晶體,以鉍金電極作為接觸,製作下閘極結構之二硫化鎢電晶體。常溫下,二硫化鎢電晶體呈現良好的歐姆接觸,載子遷移率可達103.6 cm2V-1s-1,開關電流比~ 10^5;因聲子散射 ( phonon scattering ) 效應減弱,當溫度降至5 K,載子遷移率上升至543.9 cm2V-1s-1,開關電流比~ 7 × 10^6。而後繼續深入探討於電晶體結構中加入六方晶氮化硼作為緩衝層與封裝層之影響,加入緩衝層的雙層結構電晶體以及加入緩衝層和封裝層的三層結構電晶體除了同樣於常溫下展現歐姆接觸以外,因六方晶氮化硼可屏蔽來自介面的懸鍵與缺陷,而使元件表現有顯著進步。雙層結構電晶體於常溫下載子遷移率達到126.5 cm2V-1s-1,開關電流比~ 10^6,當溫度降至5 K後,載子遷移率攀升至約 720 cm2V-1s-1,開關電流比達~ 10^7;而三層結構電晶體的表現因受堆疊晶體時所產生的氣泡影響,其於常溫下載子遷移率僅90.2 cm2V-1s-1,但開關電流比仍達~ 10^6,於溫度降至5 K時,載子遷移率同樣攀升至約 720 cm2V-1s-1,開關電流比~ 10^7。本研究針對傳輸性質較佳的二硫化鎢雙層與三層結構電晶體元件進行變溫霍爾量測分析,在常溫外加閘極偏壓50 V的情況下,雙層結構電晶體之載子濃度約為 3.4×10^13 cm-2,霍爾遷移率約為16 cm2V-1s-1,而於5 K同樣外加閘極偏壓50 V時,其載子濃度約為 3.3×10^12 cm-2,霍爾遷移率上升至約360 cm2V-1s-1。而同樣外加閘極偏壓50 V的條件下,三層結構電晶體於常溫時載子濃度約為 1.2×10^13 cm-2,霍爾遷移率約為32 cm2V-1s-1,當溫度下降至5 K後,載子濃度約為 3.4×10^12 cm-2,霍爾遷移率上升至約535 cm2V-1s-1。從霍爾量測的結果中可以觀察到當溫度降低時,因聲子散射效應減弱,霍爾遷移率隨之上升。但同時也發現霍爾遷移率與預期不符地低於場效載子遷移率,此部分尚未有充足的證據釐清其原因與機制。 透過使用鉍金電極可以有效改善二硫化鎢電晶體的接觸,其元件不論於常溫或低溫皆展現出優秀的載子遷移率以及高開關電流比,而相較於未加入六方晶氮化硼的單層結構,加入六方晶氮化硼緩衝層的二硫化鎢雙層結構電晶體效能獲得全面提升,惟同時加入六方晶氮化硼緩衝層與封裝層的二硫化鎢三層結構電晶體,因二維晶體堆疊時產生氣泡,導致接近常溫的載子遷移率略於雙層結構電晶體。但除此之外,其餘溫度下的載子遷移率,以及全部實驗溫度範圍內 (5 K至室溫) 的開關電流比皆獲得改善。 Transition metal dichalcogenides (TMDCs) are notable for their atomically-thin thicknesses, high carrier mobilities, and tunable bandgaps. Tungsten disulfide (WS2), a remarkable member of TMDCs with a wide bandgap and the highest theoretically predicted carrier mobility, has shown great potential to be utilized in the next generation electronic devices. In this thesis, back-gated WS2 field-effect transistors (FETs) with bismuth/gold contacts were fabricated. WS2 and hexagonal boron nitride (hBN) flakes were prepared by tape exfoliation. At room temperature, the WS2 FET with ohmic contact exhibited a good field-effect mobility of 103.6 cm2V-1s-1 and an on/off current ratio of approximately 10^5. When the temperature decreased to 5 K, owing to the reduction of phonon scattering effect, the field-effect mobility and on/off current ratio enhance to 543.9 cm2V-1s-1 and ~ 7 × 10^6, respectively. Then we investigated the influence of adding hexagonal boron nitride (hBN) as the buffer layer and encapsulation layer in the WS2 FETs. Both the WS2 FET with hBN buffer layer and the WS2 FET with hBN buffer and encapsulation layers showed ohmic contacts at room temperature. Their electrical performance was significantly improved because the influence of surface defects from the SiO2/Si substrate was avoided when a buffer hBN layer was inserted. The field-effect mobility of the WS2 FET with bilayer structure at room temperature reaches 126.5 cm2V-1s-1, and the on/off current ratio is approximately 10^6, respectively. When the temperature decreased to 5 K, the field-effect mobility considerably increased to ~ 720 cm2V-1s-1, and the on/off current ratio reached approximately 10^7. For the sandwich structure of WS2 FET, owing to bubbles created in the stacking process, the field-effect mobility at room temperature only reaches 90.2 cm2V-1s-1, but the on/off current ratio is still approximately 10^6. When the temperature decreased to 5 K, the field-effect mobility also considerably increased to ~ 720 cm2V-1s-1, and the on/off current ratio reached approximately 10^7. Furthermore, Hall measurement was carried out for the WS2 FET with hBN buffer layer and the WS2 FET with hBN buffer and encapsulation layers. Under an applied gate bias of 50 V at room temperature, the carrier density for the WS2 FET with bilayer structure is approximately 3.4×10^13 cm-2, with a Hall mobility of about 16 cm2V-1s-1. Under the same gate bias at 5 K, the carrier density decreases to around 3.3×10^12 cm-2, accompanied by an increase in the Hall mobility to approximately 360 cm2V-1s-1. For the WS2 FET with sandwich structure under a gate bias of 50 V at room temperature, the carrier density is approximately 1.2×10^13 cm-2, with a Hall mobility of about 32 cm2V-1s-1. As the temperature drops to 5 K, the carrier density decreases to around 3.4×10^12 cm-2, while the Hall mobility rises to approximately 535 cm2V-1s-1. The results reveal a decrease in phonon scattering effects as the temperature decreases, leading to an increase in Hall mobility. However, the Hall mobility is unexpectedly lower than the field-effect mobility, and there is currently insufficient evidence to elucidate the reasons and mechanisms underlying this phenomenon. WS2 FETs with bismuth-gold contacts exhibit outstanding field-effect mobility and high on/off current ratio at both room temperature and low temperatures. Notably, the performance of the WS2 FET with bilayer structure is significantly improved by the adding a hexagonal boron nitride buffer layer compared to the single-layer structure without hexagonal boron nitride layer. However, in the case of the WS2 FET with sandwich structure, which includes both hexagonal boron nitride buffer and encapsulation layers, a slight reduction in field-effect mobility near room temperature is observed due to the formation of bubbles during the stacking process. Nevertheless, aside from this aspect, improvements are noted in the field-effect mobility at temperatures below room temperature, and the on/off current ratio is enhanced over the experimental temperature range from 5K to room temperature. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/91316 |
DOI: | 10.6342/NTU202304516 |
全文授權: | 未授權 |
顯示於系所單位: | 光電工程學研究所 |
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