多相多階併網換流器之開關電壓不平衡改善

Abstract

在傳統橋式電路架構的換流器中，比較難直接運用在中高壓的高功率應用，其最主要原因就是受到半導體元件本身的耐壓及耐流不足。然而透過多相多階式換流器能夠改善原本半導體元件耐壓及耐流不足的問題。而本論文採用的二極體箝位型多階式換流器(Diode-Clamped Multilevel Inverter)具有只需單一電壓源且電路架構簡單的優點。然而因為PCB電路板上的寄生電感以及元件封裝引腳的寄生電感，會造成上下臂開關的電壓分壓不均，導致錯估電壓餘裕而造成開關損壞。本論文主要在針對二極體箝位型換流器受寄生電感的因素，造成開關電壓不平衡的分析，並且推導出包含寄生電感電路架構的數學模型。透過數學模型分析出兩種不同策略可以有效改善開關電壓上不平衡問題，並透過simplis模擬軟體加以驗證。最後透過實作一組5kVA換流器原型機的實測，驗證本論文提出的數學模型及電壓平衡改善策略的正確性。

The conventional full-bridge DC-AC inverter can not be directly applied to medium or high voltage high-power applications due to insufficient voltage and current ratings of the semiconductor power switches. Therefore, different multi-level and multi-phase circuit topologies have been developed to solve the issue of insufficient voltage and current ratings. This thesis adopts the diode-clamped multi-level inverter which has the advantages of single voltage source requirement and circuit simplicity. However, the diode-clamped multi-level inverter suffers from the unbalanced voltage stress on the power switches due to parasitic inductors on the printed circuit board or the device package. The unbalanced voltage can easily damage power switches due to misjudging the device’s voltage rating. The objective of this thesis is to analyze the impact of the parasitic inductors to the unbalanced switch voltages of the diode-clamped inverter. The mathematical models of the diode-clamped multi-level inverter with parasitic inductors are derived first. Then, two strategies that can effectively reduce the unbalanced voltage are proposed. The effectiveness of the derived mathematical models and the proposed strategies is verified by using the Simplis simulation software. Finally, hardware experimental results from a 5kVA prototype validate the correctness of the derived mathematical models and the performance of the proposed voltage-balancing strategies.