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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 郭大維 | |
dc.contributor.author | Yu-Chia Lin | en |
dc.contributor.author | 林育佳 | zh_TW |
dc.date.accessioned | 2021-05-20T20:06:50Z | - |
dc.date.available | 2011-08-14 | |
dc.date.available | 2021-05-20T20:06:50Z | - |
dc.date.copyright | 2009-08-14 | |
dc.date.issued | 2009 | |
dc.date.submitted | 2009-08-11 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/9021 | - |
dc.description.abstract | 在現今的系統設計上,虛擬化技術為解決可攜性、可維持性、發展性以及系統使用率的問題上提供了一個極佳的解決方案。本論文中,我們將專注於開發平台虛擬化技術上的省電設計。我們探討了虛擬化核心與真實核心上計算資源的對應技術,以及在考慮系統上執行工作的時間限制下,虛擬化核心與真實核心上能源消耗的關係。透過模組化每個虛擬化核心上所需的執行資源,本論文同時考慮了即時性工作以及非即時性工作上的工作量。以此設計為基礎,本論文提出了一個以微核心為基礎,支援動態電壓調整的原型架構。並評估了此架構的功能以及造成的負擔,實驗結果展示出本設計在省電支援以及系統負擔上,有著良好的結果。 | zh_TW |
dc.description.abstract | Virtualization provides an excellent solution to resolve the portability, maintainability, development, and utilization problems in many system designs. In this paper, we are interested in energy-efficient designs for platform virtualization. In particular, we explore the computing resource mapping between virtual cores and physical cores and their energy consumption relationship when timing constraints in task executions are considered. Real-time and non-real-time task workloads are both considered in the study, where the computing needs of each virtual core is modeled with a computing server. A prototype with DVS support is implemented based on a $mu$-kernel architecture. The capability and overheads of the proposed design was evaluated, for which we have encouraging results. | en |
dc.description.provenance | Made available in DSpace on 2021-05-20T20:06:50Z (GMT). No. of bitstreams: 1 ntu-98-R96922062-1.pdf: 1122728 bytes, checksum: 1a5bd7a9e0112cf460fd31f023adb7d8 (MD5) Previous issue date: 2009 | en |
dc.description.tableofcontents | Abstract ix
Contents xi List of Figures xiii List of Tables xv 1 Introduction 1 2 System Architecture and Research Motivation 5 3 Power-Aware Virtualization System 9 3.1 A Virtual-Core Server Model . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Hypervisor Functionalities . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3 Implementation Remarks . . . . . . . . . . . . . . . . . . . . . . . . . 17 4 Performance Evaluation 19 4.1 System Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.2 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.2.1 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . 22 5 Conclusions 27 Bibliography 29 | |
dc.language.iso | en | |
dc.title | 虛擬化多核心之省電投射技術 | zh_TW |
dc.title | Energy-Efficient Mapping Technique for Virtual Processors | en |
dc.type | Thesis | |
dc.date.schoolyear | 97-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 施吉昇,洪士灝,石維寬,李政崑 | |
dc.subject.keyword | 虛擬化核心模組,開放式環境,省電設計,投射技術,虛擬化環境,微核心, | zh_TW |
dc.subject.keyword | Virtual core model,Open environment,Power-aware design,Mapping technique,Virtualization environment,$mu$-kernel, | en |
dc.relation.page | 34 | |
dc.rights.note | 同意授權(全球公開) | |
dc.date.accepted | 2009-08-11 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 資訊工程學研究所 | zh_TW |
顯示於系所單位: | 資訊工程學系 |
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