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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/87721完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 林宗賢 | zh_TW |
| dc.contributor.advisor | Tsung-Hsien Lin | en |
| dc.contributor.author | 張家翔 | zh_TW |
| dc.contributor.author | Chia-Hsiang Chang | en |
| dc.date.accessioned | 2023-07-19T16:06:39Z | - |
| dc.date.available | 2023-11-09 | - |
| dc.date.copyright | 2023-07-19 | - |
| dc.date.issued | 2023 | - |
| dc.date.submitted | 2023-06-06 | - |
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Lin, "An Open-loop VCO-based ADC with Quasi-Chopping and Non-linearity Cancellation for Bio-Sensor Applications," IEEE Biomedical Circuits and Systems Conference, pp. 317-320, Oct. 2022. [19] J. Borgmans, R. Riem and P. Rombouts, "The Analog Behavior of Pseudo Digital Ring Oscillators Used in VCO ADCs," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 7, pp. 2827-2840, Jul. 2021. [20] C.-C. Tu, Y.-K. Wang and T.-H. Lin, "A Low-Noise Area-Efficient Chopped VCO-Based CTDSM for Sensor Applications in 40-nm CMOS," IEEE Journal of Solid-State Circuits, vol. 52, no. 10, pp. 2523-2532, Oct. 2017. [21] P.-H. Huang, C.-C. Tu and T.-H. Lin, "An Area-Efficient VCO-Based Hall Sensor Readout System for Autofocus Applications," IEEE International Symposium on Circuits and Systems, pp. 1-5, May 2019. [22] W. Jiang, V. Hokhikyan, H. Chandrakumar, V. Karkare and D. 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Kim, "A 145.2dB-DR Baseline-Tracking Impedance Plethysmogram IC for Neckband-Based Blood Pressure and Cardiovascular Monitoring," IEEE International Solid-State Circuits Conference, pp. 1-3, Feb. 2022. [33] C.-L. Chen, Design of CMOS Sensor Interface Circuits for EEG and Open-Loop VCO-Based ADC, Master Thesis, 2022. [34] N. Papadopoulos, S. Steudel, A. J. Kronemeijer, M. Ameys and K. Myny, "Flexible 16nJ/c.s. 134S/s 6b MIM C-2C ADC using Dual Gate Self-Aligned Unipolar Metal-Oxide TFTs," IEEE Custom Integrated Circuits Conference, pp. 1–4, Apr. 2019. [35] H. Çeliker, A. Sou, B. Cobb, W. Dehaene and K. Myny, "Flex6502: A Flexible 8b Microprocessor in 0.8µm Metal-Oxide Thin-Film Transistor Technology Implemented with a Complete Digital Design Flow Running Complex Assembly Code," IEEE International Solid-State Circuits Conference, pp. 272-274, Feb. 2022. [36] S. Li, D. Z. Pan and N. Sun, "An OTA-Less Second-Order VCO-Based CT ∆∑ Modulator Using an Inherent Passive Integrator and Capacitive Feedback," IEEE Journal of Solid-State Circuits, vol. 55, no. 5, pp. 1337-1350, May 2020. [37] H. Ha, C. Van Hoof and N. Van Helleputte, "Measurement and Analysis of Input-Signal Dependent Flicker Noise Modulation in Chopper Stabilized Instrumentation Amplifier," IEEE Solid-State Circuits Letters, vol. 1, no. 4, pp. 90-93, Apr. 2018. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/87721 | - |
| dc.description.abstract | 本作品呈現了實作於 3 微米低溫多晶矽-薄膜電晶體製程的類比數位轉換器,主要應用於近靜態信號的感測。在類比數位轉換器的設計方面,選用時域操作的架構,解決電晶體嚴重不匹配所引起的電壓偏移,可能會導致電路飽和的問題,使得電路可以正確運作。時域的電路設計上,使用壓控振盪器取代傳統的積分器,以達到面積的高效運用。此外,採用了單端的系統級斬波技術,近一步消除電路貢獻的雜訊,提升整體的解析度和動態範圍。在電路的輸出端加入線性補償的演算法,大幅提升電路的線性度。此晶片的核心面積僅 3.6 mm2,功率消耗為 505 µW (操作在5 V 電源下),在 0.6 V 的輸入和 250 赫茲的頻寬下,可以達到 48.2 dB 的信噪比。
而最小的輸入端積分等效雜訊為 0.63 mVrms,實現了 59.6 dB 的動態範圍。在品質因素方面分別達到 FoMs = 105.2 dB 及 FoMw = 4.8 nJ/conv.。 | zh_TW |
| dc.description.abstract | In this dissertation, an analog-to-digital converter (ADC) implemented in 3-µm low temperature polycrystalline silicon thin-film transistor (LTPS-TFT) is presented. The primary objective of this work is to develop an ADC that offers high resolution and good energy efficiency for quasi-signal sensing applications. The proposed voltage-controlled oscillator (VCO)-based ADC features an area efficient and digitally intensive architecture for low-voltage operation. By employing time-domain operation, the circuit is able to mitigate issues arising from transistor mismatch and prevent saturation. Additionally, the system-level chopping technique is employed to cancel out offset voltage and flicker noise, resulting in an improved signal to-noise ratio (SNR) and dynamic range (DR). Moreover, a linear compensation method is adopted to improve the overall linearity.The core area of the ADC is 3.6 mm2, and it consumes only 505 µW of power under a 5-V power supply voltage. When operating at full-scale input voltage of 0.6 V, the SNR is measured at 48.2 dB, and the effective number of bits (ENOB) is 7.72 bits. For minimum input voltage of 1 mV and a frequency bandwidth of 250 Hz, the integrated input-referred noise is 0.63 mVrms, resulting in a DR of 59.6 dB. The FoMs of the ADC is 105.2 dB, while the FoMw is 4.8 nJ/conv. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2023-07-19T16:06:39Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2023-07-19T16:06:39Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 審定書 i
致謝 iii 摘要 v Abstract vii List of Figures xi List of Tables xv Chapter 1 Introduction 1 1.1 Background 1 1.2 Dissertation Overview 3 Chapter 2 Fundamental of Sensor Design and Prior Art in TFT and CMOS Technology 5 2.1 Introduction of General TFT Technology 5 2.2 Fundamental of Circuit Design in LTPS-TFT Technology 7 2.2.1 Mismatch of Transistors’ Threshold Voltage and Mobility 8 2.2.2 Noise Analysis 9 2.2.3 Other Consideration 12 2.3 Prior ADCs in TFT technologies 13 2.3.1 Organic TFT 13 2.3.2 Indium-Gallium-Zinc Oxide (IGZO) TFT 13 2.3.3 LTPS-TFT 15 2.4 Fundamental of General Sensor Design 17 2.4.1 Current Sensor 18 2.4.2 Resistance Sensor 18 2.5 Performance of DC Sensing ADC 20 2.5.1 Effective Resolution 20 2.5.2 Input-Referred Noise and Dynamic Range (DR) 22 Chapter 3 Design of A VCO-based ADC in LTPS-TFT Technology for Quasi-Static Sensing Signal 25 3.1 Introduction 25 3.1.1 Motivation 25 3.1.2 Introduction of Gas Sensor 25 3.1.3 Architecture of ADC 28 3.2 Fundamental of VCO-Based ADC 29 3.3 Proposed VCO-Based ADC for Gas Sensing 34 3.3.1 Introduction 34 3.3.2 Proposed System Block Diagram and Analysis 35 3.4 Circuit Implementation and Analysis 42 3.4.1 The Gm-CCO Structure 42 3.4.2 CCO Architecture 46 3.4.3 Quantizer 51 3.4.4 Linearity Compensation 52 Chapter 4 Measurement Results 55 4.1 Chip Micrograph 55 4.2 Measurement Environment and Setup 56 4.3 Measured Results 57 Chapter 5 Conclusions and Future Works 71 5.1 Conclusions 71 5.2 Future Works 72 References 77 | - |
| dc.language.iso | en | - |
| dc.subject | 線性補償 | zh_TW |
| dc.subject | 時域 | zh_TW |
| dc.subject | 近靜態信號偵測 | zh_TW |
| dc.subject | 低溫多晶矽-薄膜電晶體 | zh_TW |
| dc.subject | 感測器 | zh_TW |
| dc.subject | 壓控振盪器 | zh_TW |
| dc.subject | 類比數位轉換器 | zh_TW |
| dc.subject | 系統級斬波技術 | zh_TW |
| dc.subject | Sensor | en |
| dc.subject | Linearity compensation | en |
| dc.subject | System-level chopping | en |
| dc.subject | Voltage-Controlled Oscillator (VCO) | en |
| dc.subject | Low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT)) | en |
| dc.subject | Quasi-signal sensing | en |
| dc.subject | Energy efficiency | en |
| dc.subject | Analog-to-Digital Converter | en |
| dc.title | 低溫多晶矽製程下基於壓控振盪器的近靜態信號感測 器讀取電路設計 | zh_TW |
| dc.title | Design of VCO-Based Sensor Readout Circuits for Quasi -Static Sensing Signals in LTPS-TFT Technology | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 111-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 劉深淵;李泰成;陳忠宏 | zh_TW |
| dc.contributor.oralexamcommittee | Shen-Iuan Liu;Tai-Cheng Lee;Jhong-Hong Chen | en |
| dc.subject.keyword | 感測器,低溫多晶矽-薄膜電晶體,近靜態信號偵測,時域,壓控振盪器,系統級斬波技術,線性補償,類比數位轉換器, | zh_TW |
| dc.subject.keyword | Low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT)),Analog-to-Digital Converter,Energy efficiency,Quasi-signal sensing,Sensor,Voltage-Controlled Oscillator (VCO),System-level chopping,Linearity compensation, | en |
| dc.relation.page | 82 | - |
| dc.identifier.doi | 10.6342/NTU202300942 | - |
| dc.rights.note | 未授權 | - |
| dc.date.accepted | 2023-06-06 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電子工程學研究所 | - |
| 顯示於系所單位: | 電子工程學研究所 | |
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