請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/85877完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 吳育任(Yuh-Renn Wu) | |
| dc.contributor.author | Che-Yu Wu | en |
| dc.contributor.author | 吳哲宇 | zh_TW |
| dc.date.accessioned | 2023-03-19T23:27:22Z | - |
| dc.date.copyright | 2022-09-26 | |
| dc.date.issued | 2022 | |
| dc.date.submitted | 2022-09-23 | |
| dc.identifier.citation | [1] J. M. Early, “Out to murray hill to play: an early history of transistors,” IEEE Transactions on Electron Devices, vol. 48, no. 11, pp. 2468–2472, 2001. [2] G. Yeap, S. S. Lin, Y. M. Chen, H. L. Shang, P. W. Wang, H. C. Lin, Y. C. Peng, J. Y. Sheu, M. Wang, X. Chen, B. R. Yang, C. P. Lin, F. C. Yang, Y. K. Leung, D. W. Lin, C. P. Chen, K. F. Yu, D. H. Chen, C. Y. Chang, H. K. Chen, P. Hung, C. S. Hou, Y. K. Cheng, J. Chang, L. Yuan, C. K. Lin, C. C. Chen, Y. C. Yeo, M. H. Tsai, H. T. Lin, C. O. Chui, K. B. Huang, W. Chang, H. J. Lin, K. W. Chen, R. Chen, S. H. Sun, Q. Fu, H. T. Yang, H. T. Chiang, C. C. Yeh, T. L. Lee, C. H. Wang, S. L. Shue, C. W. Wu, R. Lu, W. R. Lin, J. Wu, F. Lai, Y. H. Wu, B. Z. Tien, Y. C. Huang, L. C. Lu, J. He, Y. Ku, J. Lin, M. Cao, T. S. Chang, and S. M. Jang, “5nm CMOS production technology platform featuring full-fledged EUV, and high mobility channel FinFETs with densest 0.021μm2 SRAM cells for mobile SoC and high performance computing applications,” in 2019 IEEE International Electron Devices Meeting (IEDM), pp. 36.7.1–36.7.4, 2019. [3] Z. Wei, G. Jacquemod, Y. Leduc, E. d. Foucauld, J. Prouvee, and B. Blampey, “Reducing the short channel effect of transistors and reducing the size of analog circuits,” Active and Passive Electronic Components, vol. 2019, 2019. [4] K. S. Novoselov, A. K. Geim, S. V. Morozov, D.-e. Jiang, Y. Zhang, S. V. Dubonos, I. V. Grigorieva, and A. A. Firsov, “Electric field effect in atomically thin carbon films,” science, vol. 306, no. 5696, pp. 666–669, 2004. [5] D. Wei, Y. Liu, Y. Wang, H. Zhang, L. Huang, and G. Yu, “Synthesis of N-doped graphene by chemical vapor deposition and its electrical properties,” Nano letters, vol. 9, no. 5, pp. 1752–1758, 2009. [6] J. W. Yang, G. Lee, J. S. Kim, and K. S. Kim, “Gap opening of graphene by dual FeCl3-acceptor and K-donor doping,” The Journal of Physical Chemistry Letters, vol. 2, no. 20, pp. 2577–2581, 2011. [7] M. Y. Han, B. Özyilmaz, Y. Zhang, and P. Kim, “Energy band-gap engineering of graphene nanoribbons,” Physical review letters, vol. 98, no. 20, p. 206805, 2007. [8] W. Liu, J. Kang, and K. Banerjee, “Characterization of FeCl3 intercalation doped CVD few-layer graphene,” IEEE Electron Device Letters, vol. 37, no. 9, pp. 1246–1249, 2016. [9] K. F. Mak, C. Lee, J. Hone, J. Shan, and T. F. Heinz, “Atomically thin MoS2: a new direct-gap semiconductor,” Physical review letters, vol. 105, no. 13, p. 136805, 2010. [10] A. Chaves, J. G. Azadani, H. Alsalman, D. R. Da Costa, R. Frisenda, A. J. Chaves, S. H. Song, Y. D. Kim, D. He, J. Zhou, A. Castellanos-Gomez, F. M. Peeters, Z. Liu, C. L. Hinkle, S.-H. Oh, P. D. Ye, S. J. Koester, Y. H. Lee, P. Avouris, X. Wang, and T. Low, “Bandgap engineering of two-dimensional semiconductor materials,” npj 2D Materials and Applications, vol. 4, no. 1, pp. 1–21, 2020. [11] P. Zhao, S. Desai, M. Tosun, T. Roy, H. Fang, A. Sachid, M. Amani, C. Hu, and A. Javey, “2D layered materials: from materials properties to device applications,” in 2015 IEEE International Electron Devices Meeting (IEDM), pp. 27–3, 2015. [12] K. S. Novoselov, A. K. Geim, S. V. Morozov, D.-e. Jiang, Y. Zhang, S. V. Dubonos, I. V. Grigorieva, and A. A. Firsov, “Electric field effect in atomically thin carbon films,” science, vol. 306, no. 5696, pp. 666–669, 2004. [13] Y. Huang, E. Sutter, N. N. Shi, J. Zheng, T. Yang, D. Englund, H.-J. Gao, and P. Sutter, “Reliable exfoliation of large-area high-quality flakes of graphene and other two-dimensional materials,” ACS nano, vol. 9, no. 11, pp. 10612–10620, 2015. [14] P.-C. Shen, Y. Lin, H. Wang, J.-H. Park, W. S. Leong, A.-Y. Lu, T. Palacios, and J. Kong, “CVD technology for 2-D materials,” IEEE Transactions on Electron Devices, vol. 65, no. 10, pp. 4040–4052, 2018. [15] Y.-H. Lee, X.-Q. Zhang, W. Zhang, M.-T. Chang, C.-T. Lin, K.-D. Chang, Y.-C. Yu, J. T.-W. Wang, C.-S. Chang, L.-J. Li, and T.-W. Lin, “Synthesis of large-area MoS2 atomic layers with chemical vapor deposition,” Advanced materials, vol. 24, no. 17, pp. 2320–2325, 2012. [16] Z. Jin, X. Li, J. T. Mullen, and K. W. Kim, “Intrinsic transport properties of electrons and holes in monolayer transition-metal dichalcogenides,” Physical Review B, vol. 90, no. 4, p. 045422, 2014. [17] X. Li, J. T. Mullen, Z. Jin, K. M. Borysenko, M. B. Nardelli, and K. W. Kim, “Intrinsic electrical transport properties of monolayer silicene and MoS2 from first principles,” Physical Review B, vol. 87, no. 11, p. 115418, 2013. [18] T. Momose, A. Nakamura, M. Daniel, and M. Shimomura, “Phosphorous doped p-type MoS2 polycrystalline thin films via direct sulfurization of Mo film,” Aip Advances, vol. 8, no. 2, p. 025009, 2018. [19] C.-C. Cheng, Y.-Y. Chung, U.-Y. Li, C.-T. Lin, C.-F. Li, J.-H. Chen, T.-Y. Lai, K.-S. Li, J.-M. Shieh, S.-K. Su, H.-L. Chiang, T.-C. Chen, L.-J. Li, H.-S. P. Wong, and C.-H. Chien, “First demonstration of 40-nm channel length top-gate WS2 pFET using channel area-selective CVD growth directly on SiO/Si substrate,” in 2019 Symposium on VLSI Technology, pp. T244–T245, 2019. [20] Y. Xia, L. Wei, J. Deng, L. Zong, C. Wang, X. Chen, F. Liang, C. Luo, W. Bao, Z. Xu, J. Zhou, Y. Pu, and X. Wu, “Tuning electrical and optical properties of MoSe2 transistors via elemental doping,” Advanced Materials Technologies, vol. 5, no. 7, p. 2000307, 2020. [21] S. H. H. Shokouh, P. J. Jeon, A. Pezeshki, K. Choi, H. S. Lee, J. S. Kim, E. Y. Park, and S. Im, “High-performance, air-stable, top-gate, p-channel WSe2 field-effect transistor with fluoropolymer buffer layer,” Advanced Functional Materials, vol. 25, no. 46, pp. 7208–7214, 2015. [22] S. Das, M. Dubey, and A. Roelofs, “High gain, low noise, fully complementary logic inverter based on bi-layer WSe2 field effect transistors,” Applied Physics Letters, vol. 105, no. 8, p. 083511, 2014. [23] H. Fang, S. Chuang, T. C. Chang, K. Takei, T. Takahashi, and A. Javey, “High-performance single layered WSe2 p-FETs with chemically doped contacts,” Nano letters, vol. 12, no. 7, pp. 3788–3792, 2012. [24] J. Singh, Electronic and optoelectronic properties of semiconductor structures. Cambridge University Press, 2007. [25] N. Loubet, T. Hook, P. Montanini, C.-W. Yeung, S. Kanakasabapathy, M. Guillom, T. Yamashita, J. Zhang, X. Miao, J. Wang, A. Young, R. Chao, M. Kang, Z. Liu, S. Fan, B. Hamieh, S. Sieg, Y. Mignot, W. Xu, S.-C. Seo, J. Yoo, S. Mochizuki, M. Sankarapandian, O. Kwon, A. Carr, A. Greene, Y. Park, J. Frougier, R. Galatage, R. Bao, J. Shearer, R. Conti, H. Song, D. Lee, D. Kong, Y. Xu, A. Arceo, Z. Bi, P. Xu, R. Muthinti, J. Li, R. Wong, D. Brown, P. Oldiges, R. Robison, J. Arnold, N. Felix, S. Skordas, J. Gaudiello, T. Standaert, H. Jagannathan, D. Corliss, M.-H. Na, A. Knorr, T. Wu, D. Gupta, S. Lian, R. Divakaruni, T. Gow, C. Labelle, S. Lee, V. Paruchuri, H. Bu, and M. Khare, “Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET,” in 2017 Symposium on VLSI Technology, pp. T230–T231, 2017. [26] X. Huang, C. Liu, Z. Tang, S. Zeng, L. Liu, X. Hou, H. Chen, J. Li, Y.-G. Jiang, D. W. Zhang, and P. Zhou, “High drive and low leakage current MBC FET with channel thickness 1.2nm/0.6nm,” in 2020 IEEE International Electron Devices Meeting (IEDM), pp. 12.1.1–12.1.4, 2020. [27] M. More, “International Roadmap for Devices and Systems (IRDS),” 2021. [28] X. Liu, M. S. Choi, E. Hwang, W. J. Yoo, and J. Sun, “Fermi level pinning dependent 2D semiconductor devices: challenges and prospects,” Advanced Materials, vol. 34, no. 15, p. 2108425, 2022. [29] R.-S. Chen, G. Ding, Y. Zhou, and S.-T. Han, “Fermi-level depinning of 2D transition metal dichalcogenide transistors,” Journal of Materials Chemistry C, 2021. [30] C. Kim, I. Moon, D. Lee, M. S. Choi, F. Ahmed, S. Nam, Y. Cho, H.-J. Shin, S. Park, and W. J. Yoo, “Fermi level pinning at electrical metal contacts of monolayer molybdenum dichalcogenides,” ACS nano, vol. 11, no. 2, pp. 1588–1596, 2017. [31] K. Sotthewes, R. Van Bremen, E. Dollekamp, T. Boulogne, K. Nowakowski, D. Kas, H. J. Zandvliet, and P. Bampoulis, “Universal Fermi-level pinning in transition-metal dichalcogenides,” The Journal of Physical Chemistry C, vol. 123, no. 9, pp. 5411–5420, 2019. [32] Y. Guo, D. Liu, and J. Robertson, “3D behavior of Schottky barriers of 2D transition-metal dichalcogenides,” ACS applied materials & interfaces, vol. 7, no. 46, pp. 25709–25715, 2015. [33] Y. Liu, J. Guo, E. Zhu, L. Liao, S.-J. Lee, M. Ding, I. Shakir, V. Gambin, Y. Huang, and X. Duan, “Approaching the Schottky–Mott limit in van der Waals metal–semiconductor junctions,” Nature, vol. 557, no. 7707, pp. 696–700, 2018. [34] T. D. Ngo, Z. Yang, M. Lee, F. Ali, I. Moon, D. G. Kim, T. Taniguchi, K. Watanabe, K.-Y. Lee, and W. J. Yoo, “Fermi-level pinning free high-performance 2D CMOS inverter fabricated with van der Waals bottom contacts,” Advanced Electronic Materials, vol. 7, no. 5, p. 2001212, 2021. [35] L. Liu, L. Kong, Q. Li, C. He, L. Ren, Q. Tao, X. Yang, J. Lin, B. Zhao, Z. Li, Y. Chen, W. Li, W. Song, Z. Lu, G. Li, S. Li, X. Duan, A. Pan, L. Liao, and Y. Liu, “Transferred van der Waals metal electrodes for sub-1-nm MoS2 vertical transistors,” Nature Electronics, vol. 4, no. 5, pp. 342–347, 2021. [36] N. Ma and D. Jena, “Charge scattering and mobility in atomically thin semiconductors,” Physical Review X, vol. 4, no. 1, p. 011043, 2014. [37] J.-H. Chen, C. Jang, S. Xiao, M. Ishigami, and M. S. Fuhrer, “Intrinsic and extrinsic performance limits of graphene devices on SiO2,” Nature nanotechnology, vol. 3, no. 4, pp. 206–209, 2008. [38] L. Zeng, Z. Xin, S. Chen, G. Du, J. Kang, and X. Liu, “Remote phonon and impurity screening effect of substrate and gate dielectric on electron dynamics in single layer MoS2,” Applied Physics Letters, vol. 103, no. 11, p. 113505, 2013. [39] B. Hu, “Screening-induced surface polar optical phonon scattering in dual-gated graphene field effect transistors,” Physica B: Condensed Matter, vol. 461, pp. 118–121, 2015. [40] I.-T. Lin and J.-M. Liu, “Surface polar optical phonon scattering of carriers in graphene on various substrates,” Applied Physics Letters, vol. 103, no. 8, p. 081606, 2013. [41] P. Giannozzi, S. Baroni, N. Bonini, M. Calandra, R. Car, C. Cavazzoni, D. Ceresoli, G. L. Chiarotti, M. Cococcioni, I. Dabo, A. D. Corso, S. d. Gironcoli, S. Fabris, G. Fratesi, R. Gebauer, U. Gerstmann, C. Gougoussis, A. Kokalj, M. Lazzeri, L. Martin-Samos, N. Marzari, F. Mauri, R. Mazzarello, S. Paolini, A. Pasquarello, L. Paulatto, C. Sbraccia, S. Scandolo, G. Sclauzero, A. P. Seitsonen, A. Smogunov, P. Umari, and R. M. Wentzcovitch, “QUANTUM ESPRESSO: a modular and open-source software project for quantum simulations of materials,” Journal of physics: Condensed matter, vol. 21, no. 39, p. 395502, 2009. [42] A. M. Lund, A. M. Orendt, G. I. Pagola, M. B. Ferraro, and J. C. Facelli, “Optimization of crystal structures of archetypical pharmaceutical compounds: A plane-wave DFT-D study using Quantum Espresso,” Crystal growth & design, vol. 13, no. 5, pp. 2181–2189, 2013. [43] M. Hosseini, M. Elahi, M. Pourfath, and D. Esseni, “Strain-induced modulation of electron mobility in single-layer transition metal dichalcogenides MX2,” IEEE Transactions on Electron Devices, vol. 62, no. 10, pp. 3192–3198, 2015. [44] D. Pearman, Electrical characterisation and modelling of Schottky barrier metal source/drain MOSFETs. PhD thesis, University of Warwick, 2007. [45] M. V. Fischetti, D. A. Neumayer, and E. A. Cartier, “Effective electron mobility in Si inversion layers in metal–oxide–semiconductor systems with a high- insulator: The role of remote phonon scattering,” Journal of Applied Physics, vol. 90, no. 9, pp. 4587–4608, 2001. [46] I.-T. Lin and J.-M. Liu, “Surface polar optical phonon scattering of carriers in graphene on various substrates,” Applied Physics Letters, vol. 103, no. 8, p. 081606, 2013. [47] T. Knobloch, Y. Y. Illarionov, F. Ducry, C. Schleich, S. Wachter, K. Watanabe, T. Taniguchi, T. Mueller, M. Waltl, M. Lanza, M. I. Vexler, M. Luisier, and T. Grasser, “The performance limits of hexagonal boron nitride as an insulator for scaled CMOS devices based on two-dimensional materials,” Nature Electronics, vol. 4, no. 2, pp. 98–108, 2021. [48] S.-H. Lo, D. Buchanan, Y. Taur, and W. Wang, “Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET’s,” IEEE Electron Device Letters, vol. 18, no. 5, pp. 209–211, 1997. [49] S. Walia, S. Balendhran, Y. Wang, R. Ab Kadir, A. Sabirin Zoolfakar, P. Atkin, J. Zhen Ou, S. Sriram, K. Kalantar-Zadeh, and M. Bhaskaran, “Characterization of metal contacts for two-dimensional MoS2 nanoflakes,” Applied Physics Letters, vol. 103, no. 23, p. 232105, 2013. [50] T. Yamaguchi, R. Moriya, Y. Inoue, S. Morikawa, S. Masubuchi, K. Watanabe, T. Taniguchi, and T. Machida, “Tunneling transport in a few monolayer-thick WS2/graphene heterojunction,” Applied Physics Letters, vol. 105, no. 22, p. 223109, 2014. [51] T. Cheiwchanchamnangij and W. R. Lambrecht, “Quasiparticle band structure calculation of monolayer, bilayer, and bulk MoS2,” Physical Review B, vol. 85, no. 20, p. 205302, 2012. [52] A. Hichri, I. B. Amara, S. Ayari, and S. Jaziri, “Dielectric environment and/or random disorder effects on free, charged and localized excitonic states in monolayer WS2,” Journal of Physics: Condensed Matter, vol. 29, no. 43, p. 435305, 2017. [53] C.-S. Pang, P. Wu, J. Appenzeller, and Z. Chen, “Sub-1nm EOT WS2-FET with I> 600μA/μm at V= 1V and SS< 70mV/dec at L= 40nm,” in 2020 IEEE International Electron Devices Meeting (IEDM), pp. 3–4, 2020. [54] C.-H. Yeh, Z.-Y. Liang, Y.-C. Lin, H.-C. Chen, T. Fan, C.-H. Ma, Y.-H. Chu, K. Suenaga, and P.-W. Chiu, “Graphene–transition metal dichalcogenide heterojunctions for scalable and low-power complementary integrated circuits,” ACS nano, vol. 14, no. 1, pp. 985–992, 2020. [55] M. Tosun, S. Chuang, H. Fang, A. B. Sachid, M. Hettick, Y. Lin, Y. Zeng, and A. Javey, “High-gain inverters based on WSe2 complementary field-effect transistors,” ACS nano, vol. 8, no. 5, pp. 4948–4953, 2014. [56] M. Yamamoto, S. Nakaharai, K. Ueno, and K. Tsukagoshi, “Self-limiting oxides on WSe2 as controlled surface acceptors and low-resistance hole contacts,” Nano letters, vol. 16, no. 4, pp. 2720–2727, 2016. [57] C. Dorow, K. O＇Brien, C. H. Naylor, S. Lee, A. Penumatcha, A. Hsiao, T. Tronic, M. Christenson, K. Maxey, H. Zhu, A. Oni, U. Alaan, T. Gosavi, A. S. Gupta, R. Bristol, S. Clendenning, M. Metz, and U. Avci, “Advancing monolayer 2-D nMOS and pMOS transistor integration from growth to Van Der Waals interface engineering for ultimate CMOS scaling,” IEEE Transactions on Electron Devices, vol. 68, no. 12, pp. 6592–6598, 2021. [58] C.-H. Yeh, W. Cao, A. Pal, K. Parto, and K. Banerjee, “Area-selective-CVD technology enabled top-gated and scalable 2D-heterojunction transistors with dynamically tunable Schottky barrier,” in 2019 IEEE International Electron Devices Meeting (IEDM), pp. 23–4, 2019. [59] H. Wang, L. Yu, Y.-H. Lee, W. Fang, A. Hsu, P. Herring, M. Chin, M. Dubey, L.-J. Li, J. Kong, and T. Palacios, “Large-scale 2D electronics based on single-layer MoS2 grown by chemical vapor deposition,” in 2012 International Electron Devices Meeting, pp. 4.6.1–4.6.4, 2012. [60] Y. Cui, R. Xin, Z. Yu, Y. Pan, Z.-Y. Ong, X. Wei, J. Wang, H. Nan, Z. Ni, Y. Wu, T. Chen, Y. Shi, B. Wang, G. Zhang, Y.-W. Zhang, and X. Wang, “High-performance monolayer WS2 field-effect transistors on high- dielectrics,” Advanced Materials, vol. 27, no. 35, pp. 5230–5234, 2015. [61] W. Liu, J. Kang, D. Sarkar, Y. Khatami, D. Jena, and K. Banerjee, “Role of metal contacts in designing high-performance monolayer n-type WSe2 field effect transistors,” Nano letters, vol. 13, no. 5, pp. 1983–1990, 2013. [62] A. Leonhardt, D. Chiappe, V. V. Afanas’ev, S. El Kazzi, I. Shlyakhov, T. Conard, A. Franquet, C. Huyghebaert, and S. de Gendt, “Material-selective doping of 2D TMDC through AlO encapsulation,” ACS applied materials & interfaces, vol. 11, no. 45, pp. 42697–42707, 2019. [63] K. Xu, Y. Wang, Y. Zhao, and Y. Chai, “Modulation doping of transition metal dichalcogenide/oxide heterostructures,” Journal of Materials Chemistry C, vol. 5, no. 2, pp. 376–381, 2017. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/85877 | - |
| dc.description.abstract | 本論文研究是透過第一原理計算取得二維材料的基本材料參數，能帶，有效質量等。在能帶中，K 谷以及 Γ 谷之間的能量高低差大小是影響傳輸特性的重要因素之一。並且考慮二維材料通道被高介電係數的介電層所包覆時所產生的遠程聲子散射。透過蒙地卡羅法來討論過渡金屬硫屬化合物的傳輸特性，模擬二維材料的電洞遷移率。四種材料的電洞遷移率在介電層 Al2O3 的影響下，在低電場下MoS2，MoSe2，WS2，WSe2 分別具有 100，66，128，92 cm2/V⋅s 的電洞遷移率。將所取得的材料參數帶入到所設計的結構來模擬二維通道電晶體的元件特性。評估不同元件在蕭特基位能障礙大小 0.0 eV 到 0.5 eV 所具有的接觸電阻，並且透過在底部閘極施加偏壓下減少其接觸電阻，進而增加電流大小。在改變蕭特基位能障礙大小下，其亞閾值擺幅趨勢在 60 mV/dec 左右，並且隨著蕭特基位能障礙上升跟著些微上升，但還是低於 IRDS 近年來的要求，75 mV/dec。在設定蕭特基障礙為 0 eV 的情況下，因 WS2 有最好的 mobility，具有導通電流 587 μA/μm。但根據二維材料的電子親和力和帶隙以及接觸金屬的功函數可以知道 WS2 和 MoS2不適合做為 PFET 的通道。而 WSe2 和 MoSe2 較適合做為 PFET 的通道。且在同樣接觸 Pt 金屬的時候，因其能帶關係，四種材料中 WSe2 具有最高的的導通電流563 μA/μm，符合 IRDS 2025 年要求的導通電流達到 546 μA/μm。因此 WSe2 是最具有潛力的 PFET 通道材料。並且我們了解在不同等效接觸電阻數量級下所對應到的導通電流數量級。 | zh_TW |
| dc.description.abstract | The research is to obtain the basic material parameters of two-dimensional materials through first-principles calculation. In the energy band, the energy difference between the K valley and the Γ valley is one of the important factors affecting the transmission characteristics. Considering the remote phonon scattering that occurs when a 2D material channel is coated with a high- dielectric layer, it is also one of the important scatterings that affect the hole mobility. The transport properties of transition metal dichalcogenides are discussed by the Monte Carlo method to simulate the hole mobility of two-dimensional materials. The hole mobilities of MoS2, MoSe2, WS2, WSe2 under the influence of Al2O3 are 100, 66, 128, and 92 cm2/V⋅s at low electric fields. The obtained material parameters are applied to the designed structure to simulate the element properties of two-dimensional channel transistors. The contact resistance of different components at source/drain with a Schottky barrier value of 0.0 eV to 0.5 eV was evaluated, and the current was increased by applying a bias voltage at the bottom gate to reduce the contact resistance. Under different Schottky barrier values, the subthreshold swing is around 60 mV/dec, and it increases slightly with the increase of Schottky barrier. But it is still lower than the requirement of IRDS in recent years, 75 mV/dec. With the Schottky barrier set to 0 eV, because WS2 has the best mobility, its Ion is 587 μA/μm. Finally, according to the electron affinity and band gap of the two-dimensional material and the work function of the contact metal, it can be known that WS2 and MoS2 are unsuitable for PFET channels. WSe2 and MoSe2 are more suitable as PFET channels. And when TMDs are all in contact with Pt metal, because of the energy band relationship, WSe2 has the highest Ion, which is 563 μA/μm, which meets the Ion required by IRDS 2025, reaching 546 μA/μm. Therefore, WSe2 is the most potential PFET channel material. In addition, we have a better understanding of the corresponding Ion current orders of magnitude under different equivalent contact resistance orders. | en |
| dc.description.provenance | Made available in DSpace on 2023-03-19T23:27:22Z (GMT). No. of bitstreams: 1 U0001-2109202220251600.pdf: 5802152 bytes, checksum: 02ba332c37692151bdaa95f78240a30c (MD5) Previous issue date: 2022 | en |
| dc.description.tableofcontents | Verification Letter from the Oral Examination Committee . . . . . . . . . . i Acknowledgements . . . . . . . . . . . . . . . . . . . . . ii 摘要. . . . . . . . . . . . . . . . . . . . . iii Abstract . . . . . . . . . . . . . . . . . . . . . v Contents . . . . . . . . . . . . . . . . . . . . . vii List of Figures . . . . . . . . . . . . . . . . . . . . . ix List of Tables . . . . . . . . . . . . . . . . . . . . . xi Chapter 1 Introduction 1 1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 2D Material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Transport Properties . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.4 International Roadmap . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.5 Fermi level pining . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 2 Methodology 10 2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 Scattering Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 Intrinsic Phonon Scattering . . . . . . . . . . . . . . . . . . . . . . . 11 2.3.1 Acoustic Phonon Scattering . . . . . . . . . . . . . . . . . . 11 2.3.2 Optical Phonon Scattering . . . . . . . . . . . . . . . . . . . 12 2.3.3 Intervalley Phonon Scattering . . . . . . . . . . . . . . . . . 13 2.4 Remote Phonon Scattering . . . . . . . . . . . . . . . . . . . . . . . 14 2.5 Multi-valley Monte Carlo Method . . . . . . . . . . . . . . . . . . . 15 2.6 Monte Carlo, Poisson and Drift-Diffusion Model . . . . . . . . . . . 17 2.6.1 Poisson and Drift-Diffusion Model . . . . . . . . . . . . . . 18 2.6.2 Monte Carlo, Poisson and Drift-Diffusion Simulation Process 19 2.6.3 Quantum Espresso simulator . . . . . . . . . . . . . . . . . . 19 Chapter 3 Hole Transport Properties of TMD Materials 21 3.1 Band structure by Quantum Espresso software . . . . . . . . . . . . 21 3.1.1 Band structure fitting . . . . . . . . . . . . . . . . . . . . . . 23 3.2 Phonon scattering . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.2.1 Acoustic phonon and optical phonon scattering . . . . . . . . 25 3.2.2 Remote phonon scattering . . . . . . . . . . . . . . . . . . . 28 Chapter 4 2D Nanosheet Transistors 33 4.1 Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.2 Initial Contact Resistance . . . . . . . . . . . . . . . . . . . . . . . 36 4.3 Device performance of 2D nanosheet transistor . . . . . . . . . . . . 42 4.4 Benchmark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Chapter 5 Conclusion and Future Work 51 References 54 Appendix A — Deformation potential constants for TMDs 65 | |
| dc.language.iso | en | |
| dc.subject | 載子遷移率 | zh_TW |
| dc.subject | 二維材料電晶體 | zh_TW |
| dc.subject | 二維材料 | zh_TW |
| dc.subject | 第一原理計算 | zh_TW |
| dc.subject | 蒙地卡羅法 | zh_TW |
| dc.subject | first-principles calculations | en |
| dc.subject | 2D material transistors | en |
| dc.subject | carrier mobility | en |
| dc.subject | Monte Carlo method | en |
| dc.subject | 2D materials | en |
| dc.title | 二維材料電洞傳輸特性及元件應用之研究 | zh_TW |
| dc.title | Studies of hole Transport Properties of Two-Dimensional Materials and Component Applications | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 110-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 吳肇欣(Chao-Hsin Wu),張子璿(Tzu-Hsuan Chang),陳建宏(Jian-Hong Chen) | |
| dc.subject.keyword | 二維材料,第一原理計算,蒙地卡羅法,載子遷移率,二維材料電晶體, | zh_TW |
| dc.subject.keyword | 2D materials,first-principles calculations,Monte Carlo method,carrier mobility,2D material transistors, | en |
| dc.relation.page | 66 | |
| dc.identifier.doi | 10.6342/NTU202203764 | |
| dc.rights.note | 同意授權(全球公開) | |
| dc.date.accepted | 2022-09-25 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 光電工程學研究所 | zh_TW |
| dc.date.embargo-lift | 2022-09-26 | - |
| 顯示於系所單位： | 光電工程學研究所 | |
文件中的檔案：
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| U0001-2109202220251600.pdf | 5.67 MB | Adobe PDF | 檢視/開啟 |
系統中的文件，除了特別指名其著作權條款之外，均受到著作權保護，並且保留所有的權利。