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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電機工程學系
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/85303
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dc.contributor.advisor郭斯彥(Sy-Yen Kuo)
dc.contributor.authorPei-Yu Loen
dc.contributor.author羅珮宇zh_TW
dc.date.accessioned2023-03-19T22:56:22Z-
dc.date.copyright2022-07-29
dc.date.issued2022
dc.date.submitted2022-07-27
dc.identifier.citationS. Adee, “The hunt for the kill switch,” IEEE Spectrum, vol. 45, no. 5, pp. 34–39, 2008. L. H. Goldstein and E. L. Thigpen, “SCOAP: Sandia controllability/observability analysis program,” in 17th Design Automation Conference, 1980, pp. 190–196. K. Hasegawa, M. Oya, M. Yanagisawa, and N. Togawa, “Hardware Trojans classification for gate-level netlists based on machine learning,” in 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS), 2016, pp. 203–206. K. Hasegawa, M. Yanagisawa, and N. Togawa, “Trojan-feature extraction at gate-level netlists and its application to hardware-Trojan detection using random forest classifier,” in 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, pp. 1–4. Kento Hasegawa, M. Yanagisawa, and N. Togawa, “A hardware-Trojan classification method using machine learning at gate-level netlists based on Trojan features,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E100.A, no. 7, pp. 1427–1438, 2017. K. Hasegawa, M. Yanagisawa, and N. Togawa, “Hardware Trojans classification for gate-level netlists using multi-layer neural networks,” in 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS), 2017, pp. 227–232. H. Salmani, M. Tehranipoor, and R. Karri, “On design vulnerability analysis and trust benchmarks development,” in 2013 IEEE 31st International Conference on Computer Design (ICCD), 2013, pp. 471–474. B. Shakya, M. T. He, H. Salmani, D. Forte, S. Bhunia, and M. M. Tehranipoor, “Benchmarking of hardware Trojans and maliciously affected circuits,” Journal of Hardware and Systems Security, vol. 1, no. 1, pp. 85–102, 2017. H. Salmani, “COTD: reference-free hardware Trojan detection and recovery based on controllability and observability in gate-level netlist,” IEEE Transactions on Information Forensics and Security, vol. 12, no. 2, pp. 338–350, 2017. C. H. Kok, C. Y. Ooi, M. Moghbel, N. Ismail, H. S. Choo, and M. Inoue, “Classification of Trojan nets based on SCOAP values using supervised learning,” in 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, pp. 1–5. C. H. Kok, C. Y. Ooi, M. Inoue, M. Moghbel, S. Baskara Dass, H. S. Choo, N. Ismail, and F. A. Hussin, “Net classification based on testability and netlist structural features for hardware Trojan detection,” in 2019 IEEE 28th Asian Test Symposium (ATS), 2019, pp. 105–1055. M. Priyadharshini and P. Saravanan, “An efficient hardware Trojan detection approach adopting testability based features,” in 2020 IEEE International Test Conference India, 2020, pp. 1–5. R. Sharma, N. K. Valivati, G. K. Sharma, and M. Pattanaik, “A new hardware Trojan detection technique using class weighted XGBoost classifier,” in 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020, pp. 1–6. S. M. S. Samimi. (2016) Testability measurement tool. [Online]. Available: https://sourceforge.net/projects/testabilitymeasurementtool/ F. T. Liu, K. M. Ting, and Z. H. Zhou, “Isolation forest,” in 2008 Eighth IEEE International Conference on Data Mining, 2008, pp. 413–422. V. Chandola, A. Banerjee, and V. Kumar, “Anomaly detection: A survey,” ACM Computing Surveys, vol. 41, no. 3, 2009. M. Hashemi, A. Momeni, A. Pashrashid, and S. Mohammadi, “Graph centrality algorithms for hardware Trojan detection at gate-level netlists,” International Journal of Engineering, vol. 35, no. 7, pp. 1375– 1387, 2022. K. Hasegawa, K. Yamashita, S. Hidano, K. Fukushima, K. Hashimoto, and N. Togawa, “Node-wise hardware Trojan detection based on graph learning,” 2021. N. Muralidhar, A. Zubair, N. Weidler, R. Gerdes, and N. Ramakrishnan, “Contrastive graph convolutional networks for hardware Trojan detection in third party IP cores,” in 2021 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2021, pp. 181–191. R. Yasaei, L. Chen, S.-Y. Yu, and M. A. A. Faruque, “Hardware Trojan detection using graph neural networks,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022. K. Nozawa, K. Hasegawa, S. Hidano, S. Kiyomoto, K. Hashimoto, and N. Togawa, “Adversarial examples for hardware-Trojan detection at gate-level netlists,” in Computer Security: ESORICS 2019 International Workshops, CyberICPS, SECPRE, SPOSE, and ADIoT, Luxembourg City, Luxembourg, September 26–27, 2019 Revised Selected Papers, 2019, p. 341–359. F. Chollet et al., “Keras,” https://keras.io, 2015. M. Abadi, A. Agarwal, P. Barham, E. Brevdo, Z. Chen, C. Citro, G. S. Corrado, A. Davis, J. Dean, M. Devin, S. Ghemawat, I. Goodfellow, A. Harp, G. Irving, M. Isard, Y. Jia, R. Jozefowicz, L. Kaiser, M. Kudlur, J. Levenberg, D. Mané, R. Monga, S. Moore, D. Murray, C. Olah, M. Schuster, J. Shlens, B. Steiner, I. Sutskever, K. Talwar, P. Tucker, V. Vanhoucke, V. Vasudevan, F. Viégas, O. Vinyals, P. Warden, M. Wattenberg, M. Wicke, Y. Yu, and X. Zheng, “TensorFlow: Large-scale machine learning on heterogeneous systems,” 2015, software available from tensorflow.org. [Online]. Available: https://www.tensorflow.org/
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/85303-
dc.description.abstract近年來,硬體木馬的潛在威脅成為積體電路產業嚴重的安全議題。隨著半導 體設計和製造階段的外包及全球化,積體電路極為容易被惡意的第三方供應商植 入硬體木馬,並暴露在重大的安全風險中,因此開發有效的硬體木馬偵測技術變 得十分必要。在基於機器學習的硬體木馬偵測研究中顯示,可測試性分析是一項 能有效分類木馬線網的特徵。然而,現有的研究大多在訓練過程中使用監督式學 習的方法。監督式學習方法涉及耗時的訓練過程,須額外處理類別不平衡問題以 及倚靠大量有標籤的資料,使它們在真實世界的應用中面臨許多挑戰。除此之外, 我們發現沒有任何研究提出將異常檢測技術用於基於機器學習的邏輯閘層次硬體 木馬偵測。本論文提出了一種在邏輯閘層次使用異常檢測的半監督硬體木馬偵測 方法。我們透過考慮不同類型的 D 型正反器改良了現有的可測試性衡量 The Sandia Controllability/ Observability Analysis Program (SCOAP) 算法,並採用半監督 異常檢測技術來檢測硬體木馬線網,最後設計一項基於拓撲的位置分析演算法來 提高偵測性能。所提出的方法在所有 Trust-Hub 邏輯閘層次木馬基準電路中,達到 99.64%真陽性率、99.999%真陰性率以及 99.998%準確率。zh_TW
dc.description.abstractRecently, hardware Trojan has become a severe security concern in the integrated circuit (IC) industry. Due to the outsourcing and globalization of semiconductor design and manufacturing phases, ICs are highly vulnerable to hardware Trojan insertion by malicious third-party vendors and are exposed to a significant security risk. Therefore, the development of effective hardware Trojan detection techniques is necessary. Testability measures have been proven to be efficient features for Trojan nets classification. However, most of the existing machine-learning-based techniques use supervised learning methods, which involve time-consuming training processes, need to cope with the class imbalance problem, and are not pragmatic when facing real-world situations. Furthermore, no works have explored the use of anomaly detection for machine-learning-based hardware Trojan detection tasks at the gate level. This thesis proposes a semi-supervised hardware Trojan detection method at the gate level using anomaly detection. We ameliorate the existing computation of the Sandia Controllability/Observability Analysis Program (SCOAP) values by considering all types of D flip-flops and adopt semi-supervised anomaly detection techniques to detect Trojan nets. Finally, a novel topology-based location analysis is utilized to improve the detection performance. Testing on all Trust-Hub gate-level Trojan benchmarks, the proposed method achieves an overall 99.64% true positive rate (TPR), 99.999% true negative rate (TNR), and 99.998% accuracy.en
dc.description.provenanceMade available in DSpace on 2023-03-19T22:56:22Z (GMT). No. of bitstreams: 1
U0001-2607202218013300.pdf: 2365782 bytes, checksum: 28a782a275113f2700931f007d4f694d (MD5)
Previous issue date: 2022
en
dc.description.tableofcontents誌謝 i 摘要 ii Abstract iii Table of Contents iv List of Figures vi List of Tables vii Chapter 1 Introduction 1 Chapter 2 Preliminaries 4 2.1 Hardware Trojans 4 2.2 Testability Measure 5 2.2.1 Combinational Controllability and Observability Calculation 6 2.2.2 Sequential Controllability and Observability Calculation 7 2.2.3 Testability Features for Hardware Trojan Detection 8 2.3 Anomaly Detection 8 Chapter 3 Related Works 10 3.1 Structural-based Detection 10 3.2 Testability-based Detection 11 3.3 Summary 13 Chapter 4 Methodology 15 4.1 Stage 1: Net Testability Analysis 16 4.2 Stage 2: Semi-supervised Anomaly Detection 18 4.2.1 Isolation Forest 18 4.2.2 Autoencoder 20 4.3 Stage 3: Topology-based Location Analysis 21 Chapter 5 Experiments and Results 24 5.1 Experimental Setup 24 5.1.1 Dataset 24 5.1.2 Evaluation Metrics 25 5.1.3 Experimental Settings 26 5.2 Results and Analysis 28 5.2.1 Experiment Results of the Proposed Method 28 5.2.2 Topology-based Location Analysis Results 32 5.2.3 Discussion and Comparison 33 Chapter 6 Conclusion 35 References 37
dc.language.isoen
dc.subject可測試性zh_TW
dc.subject異常檢測zh_TW
dc.subject邏輯閘層次zh_TW
dc.subject硬體安全zh_TW
dc.subject硬體木馬zh_TW
dc.subject機器學習zh_TW
dc.subjecthardware securityen
dc.subjecthardware Trojanen
dc.subjectgate levelen
dc.subjectanomaly detectionen
dc.subjectmachine learningen
dc.subjecttestabilityen
dc.title基於異常檢測及SCOAP特徵之半監督式硬體木馬線網分類zh_TW
dc.titleSemi-supervised Trojan Nets Classification Using Anomaly Detection Based on SCOAP Featuresen
dc.typeThesis
dc.date.schoolyear110-2
dc.description.degree碩士
dc.contributor.oralexamcommittee顏嗣鈞(Hsu-chun Yen),雷欽隆(Chin-Laung Lei),陳英一(Ing-Yi Chen),游家牧(Chia-Mu Yu)
dc.subject.keyword異常檢測,邏輯閘層次,硬體安全,硬體木馬,機器學習,可測試性,zh_TW
dc.subject.keywordanomaly detection,gate level,hardware security,hardware Trojan,machine learning,testability,en
dc.relation.page40
dc.identifier.doi10.6342/NTU202201745
dc.rights.note同意授權(限校園內公開)
dc.date.accepted2022-07-28
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電機工程學研究所zh_TW
dc.date.embargo-lift2022-07-29-
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