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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/85193完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黃天偉 (Tian-Wei Huang) | |
| dc.contributor.author | Chuan-Li Chung | en |
| dc.contributor.author | 鍾傳立 | zh_TW |
| dc.date.accessioned | 2023-03-19T22:49:23Z | - |
| dc.date.copyright | 2022-08-08 | |
| dc.date.issued | 2022 | |
| dc.date.submitted | 2022-08-05 | |
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Li, “An 88.5–110 GHz CMOS Low-Noise Amplifier for Millimeter-Wave Imaging Applications,” in IEEE Microwave and Wireless Components Letters, vol. 26, no. 2, pp. 134-136, Feb. 2016. L. Gao, Q. Ma and G. M. Rebeiz, “A 4.7 mW W-Band LNA with 4.2 dB NF and 12 dB Gain Using Drain to Gate Feedback in 45nm CMOS RFSOI Technology,” 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2018. C. -J. Liang et al., “A 0.6-V VDD W-Band Neutralized Differential Low Noise Amplifier in 28-nm Bulk CMOS,” in IEEE Microwave and Wireless Components Letters, vol. 31, no. 5, pp. 481-484, May 2021. D. Karaca, M. Varonen, D. Parveg, A. Vahdati and K. A. I. Halonen, “A 53–117 GHz LNA in 28-nm FDSOI CMOS,” in IEEE Microwave and Wireless Components Letters, vol. 27, no. 2, pp. 171-173, Feb. 2017. L. Gao, E. Wagner and G. M. Rebeiz, “Design of E- and W-Band Low-Noise Amplifiers in 22-nm CMOS FD-SOI,” in IEEE Transactions on Microwave Theory and Techniques, vol. 68, no. 1, pp. 132-143, Jan. 2020. G. Feng et al., “Pole-Converging Intrastage Bandwidth Extension Technique for Wideband Amplifiers,” in IEEE Journal of Solid-State Circuits, vol. 52, no. 3, pp. 769-780, March 2017. Fenn, Alan J., et al. “The development of phased-array radar technology.” Lincoln Laboratory Journal 12.2 (2000): 321-340. B. Razavi, Design of Analog CMOS Intergrated Circuits. New York: McGraw-Hill, 2001. T. Torii et al., “60% PAE, 30W X-band and 33% PAE, 100W Ku-band PAs utilizing 0.15 μm GaN HEMT technology,” 2016 46th European Microwave Conference (EuMC), 2016. N. Kosaka, M. Hangai, H. Uchida, N. Kikuchi, H. Koyama, Y. Kamo, et al., “An X-Band GaN High-Power Amplifier with Input and Output second harmonic Terminating Networks”, proceedings of the 2004 IEICE general conference, vol. C-2–14, Sept. 2014. M. Kimura, K Yamauchi, K Yamanaka, H Noto, E Kuwata, H Otsuka, et al., “GaN X-band 43% Intemally-Matched FET with 60W Output Power”, APMC 2008 Microwave Conference, pp. 1-4, Dec. 2008. S. Piotrowicz et al., “43W 52% PAE X-Band AlGaN/GaN HEMTs MMIC Amplifiers”, 2010 IEEE MTT-S Int. Microwave Symp. Dig., pp. 505-508, June 2010. A.N. Stameroff, H.H. Ta, Pham Anh-Vu and R.E. Leoni, “Wide-Bandwidth Power-Combining and Inverse Class-F GaN Power Amplifier at X-Band”, IEEE Trans. on Microwave Theory and Techniques, vol. 61, no. 3, pp. 1291-1130, March 2013. I. Shohei, H. Maehara, M. Koyanagi, H. Ohtsuka, A. Ohta, K. Yamanaka, et al., “An 80-W Packaged GaN High Power Amplifier for CW Operation in the 13.75–14.5 GHz band”, 2014 IEEE MTT-S International Microwave Symposium, pp. 1-4, June 2014. K. Takagi, S. Takatsuka, Y. Kashiwabara, S. Teramoto, K. Matsushita, H. Sakurai, et al., “Ku-band AlGaN/GaN-HEMT with over 30% of PAE”, MTT ‘09. IEEE MTT-S International Microwave Symposium Digest, pp. 457-460, June 2009. J. Kamioka, Y. Tarui, Y. Kamo and S. Shinjo, “54% PAE, 70-W X-Band GaN MMIC Power Amplifier With Individual Source via Structure,” in IEEE Microwave and Wireless Components Letters, vol. 30, no. 12, pp. 1149-1152, Dec. 2020. Couturier, A. et al. “50 % High Efficiency X-Band GaN MMIC Amplifier for Space Applications.” 2018 48th European Microwave Conference (EuMC) (2018): 352-355. T. Senju, K. Takagi and H. Kimura, 'A 2 W 45 % PAE X-Band GaN HEMT Class-F MMIC Power Amplifier,' 2018 Asia-Pacific Microwave Conference (APMC), 2018. High Power RF LDMOS Devices Using Low Thermal Resistivity Packages Microwave Journal https://www.microwavejournal.com/articles/1664-high-power-rf-ldmos-devices-using-low-thermal-resistivity-packages Kang, Ting, et al. 'Enhanced Thermal Management of GaN Power Amplifier Electronics with Micro-Pin Fin Heat Sinks.' Electronics 9.11 (2020). Lembeye, Olivier, and Jean-Christophe Nanan. 'Effect of temperature on high-power RF LDMOS transistors.' Applied Microwave and Wireless 14.8 (2002). M. Khanpour, S. P. Voinigescu and M. T. Yang, 'A High-Gain, Low-Noise, +6dBm PA in 90nm CMOS for 60-GHz Radio,' 2007 IEEE Compound Semiconductor Integrated Circuits Symposium, 2007. Dawn, Debasis, et al. '60GHz CMOS power amplifier with 20-dB-gain and 12dBm Psat.' 2009 IEEE MTT-S International Microwave Symposium Digest. IEEE, 2009. Choong-Yul Cha and Sang-Gug Lee, 'A 5.2-GHz LNA in 0.35-μm CMOS utilizing inter-stage series resonance and optimizing the substrate resistance,' in IEEE J. Solid-State Circuits (JSSC), vol. 38, no. 4, pp. 669-672, April 2003. S. C. Cripps, RF Power Amplifiers for wireless Communications. Bostom, MA: Artech House, 2000. Ma, Xinyu, Baoxing Duan, and Yintang Yang. 'A 500–600 MHz GaN power amplifier with RC–LC stability network.' Journal of Semiconductors 38.8 (2017). Xiaofang, Liang. 'Stability analysis and design of X-band sol—id-state power amplifier.' Modern Radar 29.12 (2007). Steve C. Cripps, RF power amplifiers for wireless communications, Artech House, Boston,1999. Round Wire Inductance Calculator. [Online] : https://chemandy.com/calculators/round-wire-inductance-calculator.htm H. -Y. Huang, J. -J. Huang, J. -B. Cai and H. -Y. Chang, 'A 12-to-17 GHz Power Amplifier Using T-Model Matching Network in 0.25-µm GaN pHEMT Technology,' 2019 IEEE Asia-Pacific Microwave Conference (APMC), 2019. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/85193 | - |
| dc.description.abstract | 本論文包含三個部份。第一部分是一個針對天文應用之次世代超大型陣列(ngVLA)需求所設計的E波段(E-band)的低雜訊放大器，使用28奈米互補式金氧半場效電晶體(CMOS)製程。第二部分是一個針對相位陣列系統之需求所設計的X波段(X-band)功率放大器，使用0.25微米氮化鎵高電子移動率電晶體(HEMT)製程製作。最後討論利用高通濾波器來增加整體電路穩定性，以及在偏壓電路(bias circuit) 模擬上討論多種方法與組合來增強電路低頻穩定度。 第一部分提出使用28奈米HPC-plus CMOS製作的E頻帶擁有 3.8 dB 雜訊指數的低雜訊放大器，其電路由一級共源極(common-source)架構串聯兩級疊接放大器(cascode amplifier)，當中在疊接放大器(cascode amplifer)的共閘極(common-gate)使用增益提升(gm-boosting)技術，能使整體增益明顯上升，並在疊接放大器之共源、共閘極間串接傳輸線將輸出阻抗移至匹配損耗低之區域。整體電路多大數使用傳輸線作為匹配網路來達到高平坦增益寬頻的低雜訊放大器，分段式的匹配使各級偏壓調整，可調整整體增益；此電路在 93.4 GHz 達到小訊號增益最大值 22.3 dB。透過偏壓調整，3-dB 頻段內的小訊號增益都能達到 16 dB 以上，且整體增益平坦度達± 0.5 dB 內，3-dB 小訊號頻寬為 63.8 到 93.1 GHz，並在 68 GHz 達到最小 3.8 dB 的雜訊指數，頻帶內雜訊指數平均為 5.24 dB；直流功耗約為 42 mW，而晶片的總面積約為 0.5 平方毫米。 第二部分呈現一顆使用 0.25 微米氮化鎵高速場效電晶體(HEMT)製程製作的31.3 dB 輸出功率放大器，這顆功率放大器的操作頻率鎖定在 9-11 GHz 來符合X波段的應用。我們採用了兩極共源級放大器來維持良好的增益，選擇深Class-AB類之偏壓情況來獲取最高的效率。再者，我們也使用了電阻並聯電容、共模穩定電阻來增強電路穩定度。此外，考慮製程變異，將小電容分別改為串聯大電容實現減少變異影響。量測結果顯示此放大器在 9.2 GHz 到 11.5 GHz 頻寬中，提供約 30 dBm 的飽和輸出功率(Psat)和最高30%的功率附加效率(PAE)。 最後一部分利用偏壓電路的模擬與高通濾波器的設計增強電路穩定度，以第一部分與第二部分之量測結果進行研究，詳細的說明如何解決低頻震盪、偏壓電路與震盪關係的現象討論。在低頻率(0.1 GHz)以下，電路內之偏壓電路難以設計並顧全低頻，時常在量測時發生震盪訊號。最後一部分透過 Advanced Design System(ADS)軟體模擬出潛在的震盪風險，利用 ADS 模擬比對前兩部分電路之量測結果，歸納出合適的檢驗及解震方法。 | zh_TW |
| dc.description.abstract | This thesis consists of three parts. The first part is an E-band low-noise amplifier with a minimum noise figure of 3.8 dB designed for astronomical applications, especially in next generation very large array (ngVLA), using 28-nm CMOS process. The second part is a X-band power amplifier designed for phased array system applications using 0.25 um GaN HEMT process. Finally, we discuss the use of high-pass filters to improve circuit low-frequency stability as well as a number of techniques and combinations to improve circuit overall stability. The first part proposes an E-band low-noise amplifier using 28-nm CMOS HPC-plus with a minimum noise figure of 3.8 dB, with a one-stage common-source structure followed by a two-stage cascode amplifier. The gain-boosting technique is used at the common-gate of the cascode amplifier to increase the overall gain significantly, and the output impedance is matched to a low-loss region by connecting transmission lines in series between the common-source and common-gate of the cascode amplifier. The overall circuit mostly uses transmission lines as a matching network to achieve a high gain flatness wideband low-noise amplifier, and the segmented matching enables bias adjustment at each stage to adjust the overall gain. The circuit achieves a maximum small-signal gain of 22.3 dB at 93.4 GHz. With bias adjustment, the small-signal gain in the 3-dB bandwidth can reach more than 16 dB, and the overall gain flatness is within ±0.5 dB. The 3-dB small-signal bandwidth is 63.8 to 93.1 GHz, and minimum noise figure of 3.8 dB is achieved at 68 GHz, with an average in-band noise figure of 5.24 dB. The total area of the chip is about 0.5 mm2. In the second part, we present a high output power amplifier using 0.25-um GaN HEMT process, the operating frequencies of this work is targeted at 9-11 GHz for X-band applications. In order to obtain good gain performance, a two-stage common source amplifier was chosen for the design and deep Class-AB bias was selected to obtain the highest efficiency. In addition, we use a resistor in parallel with the capacitor and common mode resistors to improve the stability of the circuit. Moreover, the effect of variation can be reduced by considering process variation using large capacitors connected in series instead of small capacitors. Measurements show that the amplifier provides a saturation output power (Psat) of about 30 dBm and a peak power added efficiency (PAE) of up to 30% over a bandwidth of 9.2 GHz to 11.5 GHz. The following sections discuss the use of high-pass filters to improve overall circuit stability, as well as a variety of methods and combinations for bias circuit simulation to enhance circuit low-frequency stability. The phenomenon of bias circuit in relation to oscillation is also discussed. At low frequencies (0.1 GHz) and below, which are difficult to simulate with EM simulation software, oscillation signals are often present during measurements. The last part is simulated by the Advanced Design System (ADS) software to identify potential oscillation risks, and the ADS simulation is used to compare the measurement results of the first two parts of the circuit and to summarize the appropriate inspection and solving oscillation methods. | en |
| dc.description.provenance | Made available in DSpace on 2023-03-19T22:49:23Z (GMT). No. of bitstreams: 1 U0001-1601202214134000.pdf: 7812558 bytes, checksum: ed49a24666b766c1def6e28d607a6879 (MD5) Previous issue date: 2022 | en |
| dc.description.tableofcontents | 誌謝 i 中文摘要 iv ABSTRACT vi CONTENTS viii LIST OF FIGURES xi LIST OF TABLES xviii Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.1.1 Next-generation Very Large Array(ngVLA) [1] 1 1.1.2 Phased Array [26] 3 1.2 Literature Survey 4 1.2.1 E-Band and W-Band CMOS Low Noise Amplifier 4 1.2.2 X-Band GaN Power Amplifier 6 1.3 Contributions 8 1.3.1 63.8-93.1-GHz High Gain Flatness Low Noise Amplifier 8 1.3.2 A 31.3 dBm Output Power Amplifier at X-band 9 1.3.3 60-90 GHz Low Noise Amplifier with High-Pass Filter for Stability Enhancement 9 1.4 Thesis Organization 10 Chapter 2 A 63.8-93.1-GHz Low Noise Amplifier Using 0.9-V 28-nm HPC-plus CMOS Process 11 2.1 Introduction 11 2.2 Circuit Design 13 2.2.1 Circuit Architecture 13 2.2.2 Device and Bias Selection 16 2.2.3 Noise Reduction Technique 26 2.2.4 Gm-Boosting Technique 30 2.2.5 Matching Network and Simulation Results 33 2.2.6 Passive Components Design (RF Pads, DC Block, Bypass Capacitors) 42 2.3 Experimental Results 46 2.4 Circuit Debug 61 2.5 Summary 64 Chapter 3 A 31.3 dBm Output Power Amplifier at X-band Using 0.25-m GaN HEMT process 66 3.1 Introduction 66 3.2 Circuit Design 69 3.2.1 Circuit Architecture 69 3.2.2 Device Size and Bias Selection 70 3.2.3 Output Stage Design 73 3.2.4 Driver Stage Design 79 3.2.5 Stability Analysis 82 3.2.6 Circuit Simulated Results 86 3.3 Experimental Results 91 3.4 Summary 96 Chapter 4 A 60-90 GHz Low Amplifier with High-Pass Filter for Stability Enhancement 98 4.1 Introduction 98 4.2 Bias Network Discussion 99 4.3 Summary 110 Chapter 5 Conclusion 111 REFERENCE 113 | |
| dc.language.iso | en | |
| dc.subject | 低雜訊放大器 | zh_TW |
| dc.subject | 氮化鎵 | zh_TW |
| dc.subject | 相位陣列 | zh_TW |
| dc.subject | 功率放大器 | zh_TW |
| dc.subject | 寬頻 | zh_TW |
| dc.subject | 增益平坦度 | zh_TW |
| dc.subject | X波段 | zh_TW |
| dc.subject | 互補式金屬氧化物半導體 | zh_TW |
| dc.subject | E波段 | zh_TW |
| dc.subject | X-band | en |
| dc.subject | Phased array | en |
| dc.subject | Gain flatness | en |
| dc.subject | CMOS | en |
| dc.subject | E-band | en |
| dc.subject | Wideband | en |
| dc.subject | Power amplifier | en |
| dc.subject | GaN | en |
| dc.subject | Low noise amplifier | en |
| dc.title | E波段低雜訊放大器與X波段功率放大器之設計 | zh_TW |
| dc.title | Design of An E-band Low Noise Amplifier Using 28-nm CMOS process and A X-band Power Amplifier Using 0.25-um GaN HEMT process | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 110-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 黃裕津(Yuh-Jing Hwang),李俊興(Chun-Hsing Li),鄭宇翔(Yu-Hsiang Cheng),蔡政翰(Jeng-Han Tsai) | |
| dc.subject.keyword | 互補式金屬氧化物半導體,低雜訊放大器,氮化鎵,功率放大器,寬頻,E波段,X波段,增益平坦度,相位陣列, | zh_TW |
| dc.subject.keyword | CMOS,Low noise amplifier,GaN,Power amplifier,Wideband,E-band,X-band,Gain flatness,Phased array, | en |
| dc.relation.page | 119 | |
| dc.identifier.doi | 10.6342/NTU202200070 | |
| dc.rights.note | 同意授權(限校園內公開) | |
| dc.date.accepted | 2022-08-05 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| dc.date.embargo-lift | 2027-08-08 | - |
| 顯示於系所單位： | 電信工程學研究所 | |
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