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  1. NTU Theses and Dissertations Repository
  2. 進修推廣部
  3. 事業經營碩士在職學位學程
Please use this identifier to cite or link to this item: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/84588
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???org.dspace.app.webui.jsptag.ItemTag.dcfield???ValueLanguage
dc.contributor.advisor陳忠仁zh_TW
dc.contributor.advisorChung-Jen Chenen
dc.contributor.author樊孚zh_TW
dc.contributor.authorFu Fanen
dc.date.accessioned2023-03-19T22:16:40Z-
dc.date.available2023-12-27-
dc.date.copyright2022-10-08-
dc.date.issued2022-
dc.date.submitted2002-01-01-
dc.identifier.citation【英文文獻】
1.Michael E. Porter (1979), How Competitive Forces Shape Strategy, Harved Business Review.
2.Michael E. Porter (1996), What is Strategy?, Harved Business Review.
3.Boston Consulting Group (1970), BCG matrix, Boston Consulting Group website.
4.Grant, Robert M (2009) Contemporary Strategy Analysis. 6e. John Wiley & Sons.
5.Michael E. Porter (1985). Competitive Advnatage. Boston : Harvard Business School Press.
6.Samuel Naffziger (2020). AMD Chiplet Architecture for High-Performance Server and Desktop Products. 2020 IEEE(ISSCC).
7.Gabriel H. Loh (2021). Understanding Chiplets Today to Anticipate Future Integration Opportunities and Limits. 2021 IEEE(DATE).
8.Dylan Stow (2017). Cost-effective design of scalable high-performance systems using active and passive interposers. 2017 IEEE(ICCAD).
9.Mark Ping Chan Mok (2021). Chiplet-based System-on-Chip for Edge Artificial I-Companyligence. 2021 IEEE(EDTM).
10.Anthony Mastroianni (2022). Proposed Standardization of Heterogenous Integrated Chiplet Models. 2022 IEEE(3DIC).
11.M. Hutner (2020). Special Session: Test Challenges in a Chiplet Marketplace. 2020 IEEE(VLSI).



【中文文獻】
1.陳忠仁. (2022) 。策略管理。華泰文化事業。
2.許明哲. (2021)。先進微電子3D-IC構裝。五南圖書出版股份有限公司。
3.劉志鵬. (2020)。半導體產業垂直整合與分工模式的經營績效與經濟價值之實證研究 (碩士)。國立台灣大學。
4.沈靖堂. (2021)。台積公司的經營策略與商業模式創新 (碩士)。國立台灣大學
5.梁明成. (2004)。台灣半導體矽智財產業經營模式與競爭策略研究 (碩士)。國立台灣大學。
6.李思思. (2020)。IC設計產業廠商之經營與策略分析-以瑞昱半導體股份有限公司為例 (碩士)。國立台灣大學。
7.李雯琪. (2022)。半導體晶圓代工廠商與封測廠商競合關係之探討-以T-公司與日月光為例 (碩士)。國立政治大學。

【網路資料】
1.T-公司官網。
2.I-公司官網。
3.AMD官網。檢自: https://www.amd.com
4.工業技術研究院。檢自: https://www.itri.org.tw
5.IC Insights。檢自: https://www.icinsights.com
6.Gartner。檢自: https://www.gartner.com
7.DIGITIMES。檢自: https://www.digitimes.com
8.YOLE Group。檢:自https://www.yolegroup.com
9.OMDIA。檢自: https://omdia.tech.informa.com
10.WSTS。檢自: https://www.wsts.org
11.GMI。檢自: https://www.gminsights.com
12.GlobalNewwire。檢自: https://www.globenewswire.com
13.MARKETSANDMARKETS。檢自: https://www.marketsandmarkets.com
14.MEPTEC。檢自: https://www.meptec.org
15.EETimes。檢自: https://www.eettaiwan.com
16.HPCwire。檢自: https://www.hpcwire.com
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/84588-
dc.description.abstract在萬物互聯的大數據時代,對資料處理的速度、效率與延遲的要求越來越高。應用在資料中心與邊緣運算伺服器的高效能運算晶片便是大數據相關應用是否能持續發展的關鍵因素。然而,推動科技進步長達50年的半導體產業卻在此時遇到了市場、技術、經濟以及傳統系統單晶片(SoC)架構限制等挑戰,摩爾定律是否能各延續其過去所帶來的技術突破以及經濟效益已被打上問號。
小晶片(Chiplet)被視為延續甚至超越摩爾定律的關鍵架構,其將原先因整合了多個功能模組與核心的大面積系統單晶片(SoC)拆解為多個不同功能的小晶片並分別製造完成後,再利用先進封裝技術將多個小晶片像堆樂高積木般整合在單一封裝之中。小晶片架構對半導體產業的未來提供了更系統層面的性能提升、更經濟的製造方式以及更短的產品開發時程。由於小晶片的未來性與市場的高成長性,全球半導體大廠無不積極展開對小晶片架構的市場與技術佈局。
本研究採用個案研究的分析方式,以T-公司與I-公司為案例。在對小晶片產業的崛起背景、市場、產品以及封裝技術進行整體的介紹,接著再利用五力分析探討出產業的關鍵因素並比較兩家公司的財務狀況、事業組合、企業層級的經營與發展策略以及小晶片發展策略進行詳細的剖析。T-公司與I-公司不僅在核心資源與能力和小晶片產業的關鍵因素具有高匹配性,兩家公司的企業發展策略更是皆投入大量的資源在小晶片市場發展。經過比對小晶片產業的關鍵要素與兩家公司的資源、能力與策略後,本研究整理出T-公司與I-公司在小晶片產業的優勢與劣勢並給予建議。
zh_TW
dc.description.abstractIn the era of big data where everything is connected, the requirements for higher data processing speed, better efficiency and lower delay are getting higher and higher. High-performance computing chips used in data centers and edge computing servers are the key factor in the sustainable development of big data-related applications. However, the semiconductor industry, which has driven technology evolution for over 50 years, has encountered market, technology, economic and SoC architecture challenges at this time. Can Moore's Law continue the technological breakthroughs and bringing economic benefits have been put in question.
Chiplet is regarded as a key architecture that continues or even surpasses Moore's Law. It disassembles the original large-area SoC which integrates multiple functional modules and cores into multiple small chips with different functions. After these small chips being manufactured separately, advanced packaging technology is used to integrate multiple small chips into a single package like a stack of Lego blocks. Comparing to traditional SoC architecture, the chiplet architecture offers better system-level performance improvements, more economical manufacturing, and shorter time to market. Due to the potential of Chiplet in both market and technology, global semiconductor manufacturers are proactively developing Chiplet architecture technology and making market strategy.
This research adopts the analysis method of case study and taking T-Company and I-Company as the target companies. After an overall introduction of the background, market, products and key packaging technologies of the Chiplet, Porter five forces analysis is adopted to explore the critical success factor of Chiplet manufacturing industry. The financial status, business portfolio, and enterprise-level operation and development strategy of the two companies were analyzed in detail. It is shown that both T-Company and I-Company possessed the matched core resources and capabilities to the critical success factor of Chiplet manufacturing industry, they also invest a lot of resources in Chiplet technology and market development. By comparing the critical success factor of Chiplet manufacturing industry and the resources, capabilities and strategies of the two companies, this study sorts out the advantages and disadvantages of T-Company and I-Company and gives development strategy suggestions.
en
dc.description.provenanceMade available in DSpace on 2023-03-19T22:16:40Z (GMT). No. of bitstreams: 1
U0001-1509202212404400.pdf: 4775415 bytes, checksum: b6779512967b5aca62a3e8060a3059a1 (MD5)
Previous issue date: 2022
en
dc.description.tableofcontents口試委員審定書....#
誌謝....i
摘要....ii
Abstract...iii
目錄....v
圖目錄...ix
表目錄....xi

Chapter 1 緒論 1
1.1 研究動機 1
1.2 研究問題與目的 1
1.3 研究方法與限制 2
1.4 研究流程 2
Chapter 2 文獻探討 4
2.1 業五力分析 4
2.2 競爭策略分析 5
2.3 事業組合分析 5
2.4 策略活動系統圖分析 7
2.5 半導體產業競爭文獻回顧 8
Chapter 3 產業分析 12
3.1 小晶片異質整合封裝市場的崛起 12
3.1.1 技術層面 12
3.1.2 經濟層面 13
3.1.3 系統單晶片(SoC)的挑戰 15
3.1.4 小晶片(Chiplet) 18
3.1.5 小晶片(Chiplet)之優勢 19
3.1.6 小晶片架構的產品應用 21
3.1.7 小晶片架構發展挑戰 23
3.2 IC市場概況 25
3.2.1 半導體產業概況 25
3.2.2 封裝市場概況 26
3.2.3 先進封裝市場概況 26
3.2.4 小晶片異質整合進封裝市場概況 28
3.2.5 UCIe聯盟 (Universal Chiplet Interconnect Express) 29
3.3 小晶片異質整合封裝相關技術與產品市場分析 30
3.3.1 2.5D高密度扇出型封裝 30
3.3.2 2.5D 矽中介層封裝 30
3.3.3 2.5D 嵌入式橋接封裝 31
3.3.4 3D封裝 32
3.4 五力分析與產業關鍵要素 35
3.4.1 五力分析 35
3.4.2 產業關鍵因素 38
Chapter 4 主要競爭者 42
4.1 T-公司 43
4.1.1 公司介紹 43
4.1.2 企業歷年營收及獲利狀況 43
4.1.3 主要事業-製造服務之產品應用 45
4.1.4 事業組合分析 48
4.1.5 企業層級策略分析 52
4.1.6 先進封裝發展 57
4.1.7 小晶片異質整合封裝經營發展策略 63
4.1.8 T-公司與日月光之競合關係 64
4.2 I-公司 (I-Company Corporation) 65
4.2.1 公司介紹 65
4.2.2 企業歷年營收及獲利狀況 68
4.2.3 主要事業-產品應用 71
4.2.4 事業組合分析 80
4.2.5 企業層級策略分析 84
4.2.6 小晶片封裝發展 89
4.2.7 小晶片封裝經營發展策略 96
4.3 小晶片產業之關鍵要素與企業經營策略比較分析 97
Chapter 5 結論與建議 106
5.1 研究結論 106
5.1.1 小晶片市場的興起 106
5.1.2 小晶片市場的產業關鍵要素 106
5.2 研究建議 108
5.2.1 T-公司的優劣勢與經營策略建議 108
5.2.2 I-公司的優劣勢與經營策略建議 109
參考文獻 113
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dc.language.isozh_TW-
dc.subject小晶片zh_TW
dc.subject五力分析zh_TW
dc.subject2.5D/3D封裝zh_TW
dc.subject異質整合zh_TW
dc.subject小晶片zh_TW
dc.subject半導體產業zh_TW
dc.subject五力分析zh_TW
dc.subject2.5D/3D封裝zh_TW
dc.subject異質整合zh_TW
dc.subject半導體產業zh_TW
dc.subject2.5D/3D Packagingen
dc.subjectSemiconductor Industryen
dc.subjectChipleten
dc.subjectHeterogeneous integrationen
dc.subjectPorter 5 Forceen
dc.subjectChipleten
dc.subjectSemiconductor Industryen
dc.subjectPorter 5 Forceen
dc.subject2.5D/3D Packagingen
dc.subjectHeterogeneous integrationen
dc.title超越摩爾:小晶片製造市場之廠商經營與發展策略分析-以T公司與I公司為例zh_TW
dc.titleMore than Moore:The Management and Growth Strategy Analysis of Chiplet Manufacturing Company - The Case Study of T-Company and I-Companyen
dc.typeThesis-
dc.date.schoolyear110-2-
dc.description.degree碩士-
dc.contributor.oralexamcommittee陳玠甫;石百達;陳俊忠zh_TW
dc.contributor.oralexamcommitteeJeff Chen;Pai-Ta Shih;Chun-Chung Chenen
dc.subject.keyword半導體產業,小晶片,異質整合,2.5D/3D封裝,五力分析,zh_TW
dc.subject.keywordSemiconductor Industry,Chiplet,Heterogeneous integration,2.5D/3D Packaging,Porter 5 Force,en
dc.relation.page115-
dc.identifier.doi10.6342/NTU202203429-
dc.rights.note同意授權(限校園內公開)-
dc.date.accepted2022-09-21-
dc.contributor.author-college進修推廣學院-
dc.contributor.author-dept事業經營碩士在職學位學程-
dc.date.embargo-lift2027-07-31-
Appears in Collections:事業經營碩士在職學位學程

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