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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 李坤彥(Kung-Yen Lee) | |
| dc.contributor.author | Yi-Hsuan Li | en |
| dc.contributor.author | 李宜軒 | zh_TW |
| dc.date.accessioned | 2023-03-19T22:12:28Z | - |
| dc.date.copyright | 2022-09-27 | |
| dc.date.issued | 2022 | |
| dc.date.submitted | 2022-09-24 | |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/84465 | - |
| dc.description.abstract | 本論文以1700伏特碳化矽平面式垂直金氧半場效電晶體之結構設計為主軸，並使用TCAD Sentaurus模擬軟體進行電性模擬。在主動區結構中，透過調整磊晶濃度、厚度，以確立元件之崩潰電壓大小，並且為防止元件因突波電壓而毀損，使用2100 V作為模擬之耐壓基準。另一方面，本文對閘極氧化層之厚度做電性模擬，使元件不論順、逆向運作時，皆有相當的可靠度。除了以上的基礎製程參數設計之外，為降低元件之特徵導通電阻，本文在電晶體內部加入電流擴散層，包含不同類型的離子佈植、摻雜濃度峰值分佈與磊晶方式，並進行模擬分析。從結果可以得知，在元件中使用磊晶式的電流擴散層，不僅能夠在相同崩潰電壓下降低阻值至3.01 mΩ∙cm2，此種結構在逆向操作時的氧化層電場也是最小的。此外，為在逆向操作時保護元件之主動區，本文亦針對電晶體的邊緣終端保護結構進行設計，包含接面終端延伸(JTE)、內環(P+ Rings)以及外環結構(MFZ, JTE rings)。其中未加入P+ rings時，整體終端區僅有一最佳化崩潰電壓，對JTE植入劑量的變化相當敏感，透過不同數量Rings的加入，並配合MFZ區域之大小最佳化，使終端區下方的電場分佈呈現均勻遞減，不僅能夠提高RAJTE的崩潰電壓至約2400 V，且能夠提高此種結構的製程誤差容忍度。 | zh_TW |
| dc.description.abstract | This work focuses on the design of the 1700 V planar VDMOSFET. The TCAD Sentaurus is used for simulation. In the active area of the device, the breakdown voltage, BV, is simulated with adjusting the epitaxial concentration and thickness. Also, the approval BV standard is set to be 2100 V, preventing the device from being damaged due to pulse voltage. Considering the reliability of the MOSFET, different thickness of the gate oxide layer is also simulated to understand the forward, reverse characteristics. Except for the basic structural design, the study introduces the current spreading layer (CSL) to reduce the specific on-resistance, Ron,sp, of the device. The CSL analysis is conducted with different approaches, including various types of ion implantation, doping concentration peak distribution and multiple epitaxial layer. It turns out that the application of an epitaxial CSL in the MOSFET not only reduce the Ron,sp to 3.01 mΩ∙cm2 with the same breakdown voltage, BV, but also maintain the lowest oxide field during reverse bias. On the other hand, to protect the device during reverse operation, the edge termination structure of the MOSFET is also designed, including junction termination extension (JTE), inner P+ rings and outer ring structure (JTE rings). The MFZJTE is the JTE structure without P+ rings added, and it is quite sensitive to the variation of JTE implantation dose. The RAJTE is the MFZJTE with the addition of P+ rings. By optimizing the numbers of P+ rings and the size of the MFZ area, the electric field distribution is more uniformly distributed. Therefore, the BV of RAJTE is about 2400 V, and the process tolerance is greatly improved. | en |
| dc.description.provenance | Made available in DSpace on 2023-03-19T22:12:28Z (GMT). No. of bitstreams: 1 U0001-2209202214272500.pdf: 6949947 bytes, checksum: 76ebce347a1047ee4a17c1248cb933ba (MD5) Previous issue date: 2022 | en |
| dc.description.tableofcontents | 目錄 致謝 i 中文摘要 ii Abstract iii 目錄 iv 圖目錄 vi 表目錄 ix 第一章 緒論 1 1.1 前言 1 1.2 碳化矽材料性質介紹 2 1.3 研究動機 4 1.4 論文大綱 5 第二章 元件結構原理 6 2.1 常見的功率元件種類 6 2.2 垂直型功率金氧半場效電晶體結構 7 2.2.1垂直型金氧半場效電晶體的順向導通機制 9 2.2.2垂直型金氧半場效電晶體的逆向崩潰機制 14 2.3 邊緣終端結構 16 2.4.1常見的邊緣終端保護結構 18 第三章 模擬環境 22 3.1 物理模型 22 3.2 模擬方法 25 第四章 金氧半場效電晶體模擬結果分析與討論 26 4.1 1700V DMOSFET元件初始模擬設計 26 4.1.1 飄移區濃度與閘極氧化層厚度調變 33 4.1.2 接面場效電晶體JFET寬度調變 37 4.2 加入電流擴散層(CSL) 40 4.2.1 CSL植入設計 40 4.2.2 CSL植入峰值分佈設計 45 4.2.3 CSL離子類型比較 48 4.2.4 CSL磊晶 52 4.3 整理與討論 61 第五章 終端區結構設計模擬結果分析與討論 63 5.1 終端區設計 63 5.2 整理與討論 68 第六章 結論與未來工作 70 6.1 結論 70 6.2 未來工作 71 參考文獻 73 圖目錄 圖 1.1 碳化矽基本單元四面體結構[2] 3 圖 1.2 碳化矽常見的三種堆疊模型示意圖[2] 3 圖 2.1 功率元件分類圖 6 圖 2.2 V型溝槽金氧半場效電晶體結構示意圖 8 圖 2.3 U型溝槽金氧半場效電晶體結構示意圖 9 圖 2.4 VDMOSFET結構示意圖 9 圖 2.5 MOS結構能帶圖 10 圖 2.6 VDMOSFET內部電阻組成示意圖 11 圖 2.7 VDMOSFET電流分布示意圖[7] 12 圖 2.8 VDMOSFET電阻比例示意圖 13 圖 2.9 雪崩崩潰現象示意圖[22] 14 圖 2.10 穿隧效應示意圖 15 圖 2.11 VDMOSFET等效電路圖[29] 16 圖 2.12 主動區邊緣圓柱型電場示意圖[30] 17 圖 2.13 Guard Rings結構示意圖 19 圖 2.14 JTE結構示意圖 19 圖 2.15 RA-JTE示意圖 20 圖 2.16 Field Plate示意圖 20 圖 3.1 元件模擬流程示意圖 25 圖 4.1 理論電場分佈圖 28 圖 4.2 元件結構示意圖 30 圖 4.3 模擬程式之DMOSFET元件結構圖 30 圖 4.4 初始DMOSFET模擬之ID-VG曲線 31 圖 4.5 初始DMOSFET模擬之順向ID-VD曲線 31 圖 4.6 初始DMOSFET模擬之逆向ID-VD曲線 32 圖 4.7 DMOSFET順向電流分佈圖 32 圖 4.8 DMOSFET逆向電場分佈圖 33 圖 4.9 飄移區濃度與BV、Ron,sp之關係圖 34 圖 4.10 飄移區濃度與Vth之關係圖 34 圖 4.11 飄移區濃度與EOX之關係圖 35 圖 4.12 氧化層厚度與BV、EOX之關係圖 36 圖 4.13 氧化層厚度與Ron,sp、Vth之關係圖 36 圖 4.14 JFET寬度與BV、EOX之關係圖 38 圖 4.15 JFET寬度調變之逆向水平電場變化比較 38 圖 4.16 JFET寬度調變之逆向垂直電場變化比較 39 圖 4.17 JFET寬度與Ron,sp、Vth之關係圖 39 圖 4.18 JFET寬度調變之順向電流分佈圖 40 圖 4.19 CSL於JFET區域離子佈植示意圖 42 圖 4.20 CSL垂直濃度分佈圖 42 圖 4.21 CSL植入比例、面積與BV之關係圖 43 圖 4.22 CSL植入比例、面積與EOX之關係圖 43 圖 4.23 CSL植入比例、面積與Ron,sp之關係圖 44 圖 4.24 CSL植入比例、面積與Vth之關係圖 44 圖 4.25 CSL濃度分佈調整圖 46 圖 4.26 CSL垂直濃度峰值變化圖 46 圖 4.27 CSL峰值變化與BV關係圖 47 圖 4.28 CSL峰值變化與EOX關係圖 47 圖 4.29 CSL峰值變化與Ron,sp關係圖 48 圖 4.30 不同離子之CSL濃度分佈圖 49 圖 4.31 不同離子之CSL與BV關係圖 50 圖 4.32 不同離子之CSL與EOX關係圖 50 圖 4.33 不同離子之CSL與Ron,sp關係圖 51 圖 4.34 不同離子之CSL與Vth關係圖 51 圖 4.35 CSL磊晶結構示意圖 53 圖 4.36 CSL植入與磊晶濃度分佈比較圖 53 圖 4.37 初始CSL磊晶設計與BV、EOX之關係圖 54 圖 4.38 初始CSL磊晶設計與Ron,sp、Vth之關係圖 54 圖 4.39 CSL磊晶對Pwell之影響 55 圖 4.40 CSL磊晶厚度對Pwell之影響 56 圖 4.41 HCSL與BV關係圖 56 圖 4.42 HCSL與EOX關係圖 57 圖 4.43 HCSL厚度調變在JFET區域逆向電場分佈 57 圖 4.44 HCSL厚度調變在Pwell角落逆向電場分佈 58 圖 4.45 HCSL厚度調變在P+下方逆向電場分佈 58 圖 4.46 HCSL與Ron,sp關係圖 59 圖 4.47 HCSL厚度調變與順向垂直電流密度分佈 60 圖 4.48 HCSL厚度調變與電流分佈圖 60 圖 4.49 HCSL與Vth關係圖 61 圖 5.1 初始終端結構示意圖 64 圖 5.2 JTE垂直濃度分佈 64 圖 5.3 初始終端結構模擬圖 65 圖 5.4 初始終端結構逆向ID-VD曲線圖 65 圖 5.5 初始終端結構逆向電場與空乏區分佈圖 66 圖 5.6 MFZJTE劑量比例與BV關係圖 67 圖 5.7 MFZJTE逆向電場分佈(a) DR = 0.6 ~ 1.2 (b) DR = 1.2 ~ 2.0 68 圖 5.8 MFZJTE逆向崩潰電流分佈(a) DR = 0.6 ~ 1.2 (b) DR = 1.3 ~ 2.0 68 表目錄 表 1.1 半導體材料特性比較表[3, 4] 3 表 3.1 4H-SiC 於Hatakeyama 模型的各項參數 24 表 4.1 初始結構與加入CSL後特性比較 62 | |
| dc.language.iso | zh-TW | |
| dc.title | 1700伏特碳化矽平面式金氧半場效電晶體設計與模擬 | zh_TW |
| dc.title | Design & Simulation of 1700 V 4H-SiC Planar DMOSFETs | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 110-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 李佳翰(Jia-Han Li),蕭惠心(Hui-Hsin Hsiao) | |
| dc.subject.keyword | 碳化矽,垂直金氧半場效電晶體,崩潰電壓,特徵導通電阻,電流擴散層,氧化層電場,邊緣終端保護結構,接面終端延伸結構, | zh_TW |
| dc.subject.keyword | 4H-SiC,VDMOSFET,BV,Ron,sp,CSL,Oxide Field,Edge Termination,Junction Termination Extension, | en |
| dc.relation.page | 76 | |
| dc.identifier.doi | 10.6342/NTU202203816 | |
| dc.rights.note | 同意授權(限校園內公開) | |
| dc.date.accepted | 2022-09-26 | |
| dc.contributor.author-college | 工學院 | zh_TW |
| dc.contributor.author-dept | 工程科學及海洋工程學研究所 | zh_TW |
| dc.date.embargo-lift | 2022-09-27 | - |
| 顯示於系所單位： | 工程科學及海洋工程學系 | |
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