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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 蔡坤諭(Kuen-Yu Tsai) | |
| dc.contributor.author | Sheng-Yung Chen | en |
| dc.contributor.author | 陳勝勇 | zh_TW |
| dc.date.accessioned | 2021-07-11T14:42:14Z | - |
| dc.date.available | 2026-12-31 | |
| dc.date.copyright | 2016-11-02 | |
| dc.date.issued | 2016 | |
| dc.date.submitted | 2016-08-18 | |
| dc.identifier.citation | [1] G. E. Moore, Proc. SPIE 2437, 2 (1995).
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/78100 | - |
| dc.description.abstract | 多電子束直寫(MEBDW)微影系統已被提出來提高半導體製造之吞吐量。利用微機電系統製程技術來製造電子光學系統(EOS)可大幅縮減電子束微影系統的尺寸，大量的電子束能夠被整合與驅動來對基材曝寫。然而，在微型化的電子光學系統中，電子束漂移會嚴重地侵蝕電子束的質量。此外，在傳統的電子光學系統設計流程中，聚焦特性是典型的性能指標。但他們忽略了幾個顯著設計因素，包括電極和電介質層的電崩潰、微影圖案製作真確度、電子光學系統之製造可行性與電子光學系統結構製造之覆蓋要求。為改善電子束位置精度，一個符合21 奈米半間距節點及以下之新的多電子束微影系統架構設計在此被提出來。基於原本提出用來增加吞吐量之大量平行無光罩微影系統(MPML2)加上一個叫做電子束位置監測系統(BPMS)的偵測模組。電子束的位置可透過提出的電子束漂移檢測演算法
來被實時監視，以用來啟動電子束飄移補償來滿足國際半導體技術發展藍圖(ITRS)中電路覆蓋的規格。此外，為改善電子光學系統效能與可製造性，一個直接整合了顯著設計因素來做數值最佳化之新的電子光學系統設計到製造流程被提出了。它有兩個主要部分，一個是用於電子光學系統設計參數最佳化，與另一個是電子光學系統製造。初步模擬結果指出，無崩潰之電子光學系統設計可被達成，且所得的光阻圖案製作真確度可滿足ITRS 在21 奈米半間距節點中的規範。電子光學系統元件的製造誤差和結構之覆蓋要求也被一併列入考慮來改善製程量率。該篇所提出的BPMS 增強模組和電子光學系統設計到製造流程也可應用於各種不同多電子束直寫系統以及電子束的其他工業應用。 | zh_TW |
| dc.description.abstract | Multiple-electron-beam–direct-write (MEBDW) lithography systems were proposed to increase throughput in semiconductor manufacturing. Numerous electron beams can be integrated and driven simultaneously for substrate exposure using electron-optical systems (EOSs) fabricated with micro-electromechanical system processes to substantially reduce the size of electron beam lithography systems. However, electron beam drift can seriously undermine the beam quality of the miniaturized EOSs. Besides, in conventional EOS design optimization flows, focusing properties are the typical performance indices. They neglected several significant design factors including electrical breakdown of electrodes and dielectric layers, patterning fidelity, manufacturability of the EOSs, and overlay requirements in the EOS structure fabrication. To improve beam placement accuracy, a new MEBDW lithography system architecture design is proposed for the 21-nm half-pitch node and beyond. It is based on augmenting a previously proposed massively parallel maskless lithography (MPML2) system for throughput improvement, by adding a detection module called beam position monitoring system (BPMS). The positions of the electron beams can be monitored in real time with a proposed beam drift detection algorithm to enable beam drift compensation for meeting the circuit overlay specifications of International Technology Roadmap for Semiconductors (ITRS). Moreover, to improve EOS performance and manufacturability, a new EOS design-to-manufacturing flow that directly incorporates the significant design factors into numerical optimization is proposed. It has two main parts, one for EOS design parameter optimization and the other for EOS manufacturing. Preliminary simulation results indicate that a breakdown-free EOS design is achievable, and the resulting resist patterning fidelity can meet the ITRS 21-nm half-pitch node specifications. The EOS component fabrication errors and the overlay requirements of the EOS structure can also be taken into account to improve the fabrication yield. The proposed BPMS augmentation and the EOS design-to-manufacturing flow are applicable to various MEBDW lithography systems and systems for other industrial applications. | en |
| dc.description.provenance | Made available in DSpace on 2021-07-11T14:42:14Z (GMT). No. of bitstreams: 1 ntu-105-F94921051-1.pdf: 4251215 bytes, checksum: 51f6a3fe80e3d16fad643be60ed04dbc (MD5) Previous issue date: 2016 | en |
| dc.description.tableofcontents | 口試委員會審定書 #
Acknowledgements i Abstract iii Abbreviations v Statement of Contributions vii Contents ix List of Figures xii List of Tables xvi Chapter 1 Introduction 1 1.1 Multiple-Electron-Beam–Direct-Write Lithography 1 1.2 Beam Drift Issue 4 1.3 Electron-Optical System Design-to-Manufacturing Issue 5 1.4 Overview of the Dissertation 6 1.5 Organization of the Dissertation 7 Chapter 2 A New MEBDW Lithography System Architecture Design 8 2.1 Motivation 9 2.2 Architecture Design of the MPML2 System 9 Chapter 3 Architecture Design of the Beam Position Monitoring System 12 3.1 Motivation 12 3.2 Proposed Detector Array Architecture Design and Preliminary Parameter Selection for Multiple Electron Beam Lithography System 13 3.3 Monte Carlo Simulation of Electron Scattering 15 3.4 Investigation of Detectors Signals by Monte Carlo Simulation 22 3.4.1 Working distance versus collection efficiency 22 3.4.2 Simulation of the electron beam drifting error 23 3.4.3 Cross-coupling effects in a multiple detector array 25 Chapter 4 Beam Drift Detection Algorithm 27 4.1 Motivation 27 4.2 Detector Array Architecture Design and Preliminary Parameter Considerations for MPML2 System under ITRS Requirements 30 4.2.1 MPML2 system and detector array architecture design 30 4.2.2 Parameter considerations for high-throughput EBDW under ITRS requirements 31 4.3 Simulation of Electron Behavior and Beam Drift Detection 36 4.3.1 Monte Carlo simulation of electron scattering 36 4.3.2 Working distance versus collection efficiency 40 4.3.3 Simulation of the electron-beam drift 43 4.4 Signal Processing of the Beam Position Monitoring System 44 4.4.1 Signal processing methods for solving electron-beam drift 44 4.4.2 Estimation results 48 4.4.3 Results assessment versus ITRS overlay specification for EBDW 54 4.4.4 Results assessment versus ITRS circuit overlay specifications 56 Chapter 5 Manufacturability Analysis of a MEMS-based Electron-Optical System Design for Direct-Write Lithography 59 5.1 Motivation 59 5.2 A New Manufacturability-Aware EOS Design-to-Manufacturing Flow 61 5.3 Preliminary Design of an EOS for MEBDW 63 5.4 Fabrication and Assembly 68 5.5 Simulation and Analysis 71 Chapter 6 Improvements in Electron-Optical System Performance and Associated Manufacturability 81 6.1 Motivation 82 6.2 New Lithography-Patterning-Fidelity-Aware EOS Design Optimization Flow 82 6.3 EOS Architecture Design and Preliminary Parameter Considerations for MPML2 System under the ITRS Requirements 84 6.4 Patterning Simulation Method 88 6.5 Proposed Method to Determine Optimal EOS Design Parameters and Preliminary Results 93 6.5.1 Determination of the EOS design parameters according to FPs 93 6.5.2 Selection of test patterns and initial writing parameters 94 6.5.3 Optimization of the EOS design considering lithography PF and breakdown effect 95 6.6 New EOS Design-to-manufacturing Flow for MEBDW Lithography Systems 99 Chapter 7 Conclusions and Future Work 107 7.1 Conclusions 108 7.2 Future Work 110 Bibliography 112 Vita 121 Publication List 122 | |
| dc.language.iso | en | |
| dc.subject | 無光罩微影 | zh_TW |
| dc.subject | 電子束直寫 | zh_TW |
| dc.subject | 電子光學系統 | zh_TW |
| dc.subject | 圖案製作真確度 | zh_TW |
| dc.subject | 電子束飄移 | zh_TW |
| dc.subject | Patterning fidelity | en |
| dc.subject | Electron-optical system | en |
| dc.subject | Electron-beam–direct-write | en |
| dc.subject | Maskless lithography | en |
| dc.subject | MPML2 | en |
| dc.subject | Beam drift | en |
| dc.title | 具有電子束位置精度、電子光學系統效能與結合製造可行性之改善的多電子束直寫系統設計 | zh_TW |
| dc.title | Design of Multiple-Electron-Beam–Direct-Write Systems with Improvements in Beam Placement Accuracy, Electron-Optical System Performances, and Associated Manufacturability | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 104-2 | |
| dc.description.degree | 博士 | |
| dc.contributor.oralexamcommittee | 顏家鈺(Jia-Yush Yen),陳永耀(Yung-Yaw Chen),鍾添東(Tien-Tung Chung),管傑雄(Chieh-Hsiung Kuan),李佳翰(Jia-Han Li) | |
| dc.subject.keyword | 電子束直寫,電子光學系統,圖案製作真確度,電子束飄移,無光罩微影, | zh_TW |
| dc.subject.keyword | Electron-beam–direct-write,Electron-optical system,Patterning fidelity,Beam drift,MPML2,Maskless lithography, | en |
| dc.relation.page | 129 | |
| dc.identifier.doi | 10.6342/NTU201603078 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2016-08-19 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| dc.date.embargo-lift | 2026-12-31 | - |
| 顯示於系所單位： | 電機工程學系 | |
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