利用奈米接觸設計以降低氮化鋁鎵/氮化鎵高電子遷移率電晶體之接觸電阻

Abstract

氮化鎵（GaN）所擁有的寬能隙、高飽和速度、高崩潰電場…等特性皆使其成為在製作高功率及高頻元件元件的材料選擇上為一時之選，而氮化鋁鎵/氮化鎵異質結構所擁有的高濃度的二維電子氣（2DEG），使其能有較高的電子遷移率及優異的載子傳輸特性，以此結構所製作出的氮化鋁鎵/氮化鎵高電子遷移率電晶體為現今實現高頻及高功率元件的熱門選擇之一。 從許多研究中皆能了解到接觸電阻值深深影響著元件特性的表現，因此為了有效降低接觸電阻值，本論文研究嘗試在原有之氮化鋁鎵/氮化鎵基板上，於蒸鍍歐姆接觸金屬前在金屬/半導體接面之半導體表面事先以特殊圖案設計之奈米孔洞進行特定深度蝕刻，基於其邊緣效應的影響及側壁面積增加，並由實驗結果皆證實了如此設計的有效性。 首先在不同幾何圖案設計的實驗中，由TLM量測結果得到經過奈米孔洞蝕刻後皆能使接觸電阻值降低，且由對稱排列的圓形孔洞之幾何圖形設計之接觸電阻從1.345(Ω．mm)降至0.994(Ω．mm)，而特徵接觸電阻值則由1.63×10-4(Ω．cm2)降低至5.30×10-5(Ω．cm2)；根據前項實驗結果，並且考量在基板上成長氮化鎵層的過程中所產生的錯位差排一路竄升上去而形成的介面缺陷密度後，經數學計算出所設計的奈米孔洞應小於20奈米才能形成奈米接觸，再由TLM量測結果可得特徵接觸電阻值由5.862×10-4(Ω．cm2)下降至1.345×10-5(Ω．cm2)較先前大尺寸孔洞擁有更高程度的改善；最後將此設計應用於元件上，經直流量測可得到最大飽和汲極電流從319.486（mA/mm）上升至498.785（mA/mm），轉導特性則由80（mS/mm）上升至137.875（mA/mm），導通電阻（On-resistance）則由1.03（Ω‧mm）減少至 0.89（Ω‧mm），由此結果可知元件特性皆有顯著提升，並由兩項實驗皆能歸納出接觸電阻將隨著奈米孔洞尺寸變小而降低的趨勢。

Properties Gallium nitride (GaN) have including large bandgap, high saturation velocity, high breakdown field… making it become a good material of manufacturing high power and high frequency devices. High concentration of two dimensional electron gas resulting from heterogeneous structure AlGaN/GaN makes it have much higher electron mobility and nice carrier transport property. Based on this structure, AlGaN/GaN HEMT becomes a popular device realizing these requirements. Alot of evidences figure out the contact resistance is the key point affecting the performance of devices. In order to reduce the contact resistance, this thesis introduce a new method which is using special geometrical pattern etching with particular etching depth on the original substrate surface between metal and semiconductor before deposing ohmic contact metal. Since the fringing effect and increasing surface of sidewall, the result of experiment is again proving the validity of this design. First in the experiment of different geometric pattern design, considering the result of transmission line measurement, all of the pattern with geometric pattern etching have lower contact resistance, especially the pattern in hole square design has the best performance which reducing contact resistance from 1.345(Ω．mm) to 0.994(Ω．mm) and specific contact resistance from 1.63×10-4(Ω．cm2) to 5.30×10-5(Ω．cm2). Based on this result, further considering the interface-trap density resulting from the threading dislocation of GaN layer which come from epitaxy on the substrate, it can be calculated out the size of Nano-hole should be smaller than 20nm, which make it become Nano-Contact. We found it have a much higher improving comparing with previous bigger size of Nano-hole on contact resistance which decreasing from 5.862×10-4(Ω．cm2) to 1.345×10-5(Ω．cm2). Finally, with this design on our former devices, the performance of devices can get a huge improving such as maximum saturation drain current from 319.486（mA/mm）to 498.785（mA/mm）, transconductance (Gm) from 80（mS/mm）to 137.875（mA/mm）, and On-resistance from 1.03（Ω‧mm）to 0.89（Ω‧mm）. Also, we can conclude a trend that the contact resistance will decrease following the decreasing of Nano-hole size.