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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/77682完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 呂學士(Shey-Shi Lu) | |
| dc.contributor.author | Guan-Wei Huang | en |
| dc.contributor.author | 黃冠瑋 | zh_TW |
| dc.date.accessioned | 2021-07-10T22:15:38Z | - |
| dc.date.available | 2021-07-10T22:15:38Z | - |
| dc.date.copyright | 2017-09-04 | |
| dc.date.issued | 2017 | |
| dc.date.submitted | 2017-08-17 | |
| dc.identifier.citation | [1] Armstrong, Edwin H. “Some recent developments of regenerative circuits.” Proceedings of the Institute of Radio Engineers 10.4 (1922): 244-260.
[2] Yen-Jen Chen, “Design and Research of CMOS Wireless Receiver for Short Range Communications,” Master Thesis, Graduate Institute of Electronics Engineering, National Taiwan University. [3]Ching-Jen Tung, “A 400-MHz Super-Regenerative Receiver with Digital Calibration for MICS Applications in 0.18-μm CMOS,” Master thesis, Graduate Institute of Electronics Engineering, National Taiwan University. [4] Joehl, Norbert, et al. “A low-power 1-GHz super-regenerative transceiver with time-shared PLL control.” IEEE Journal of Solid-State Circuits 36.7 (2001): 1025-1031. [5] Joehl, Norbert, et al. “A low-power 1-GHz super-regenerative transceiver with time-shared PLL control.” IEEE Journal of Solid-State Circuits 36.7 (2001): 1025-1031. [6] You-Kuang Chang, “Low Power Analog-to-Digital Converter and Super-Regenerative Receiver for Bio-Medical Applications,” Master thesis, Graduate Institute of Electronics Engineering, National Taiwan University. [7] Chen, Jia-Yi, Michael P. Flynn, and John P. Hayes. 'A 3.6 mW 2.4-GHz multi-channel super-regenerative receiver in 130nm CMOS.' Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005. IEEE, 2005. [8] Moncunill-Geniz, F. Xavier, Pere Pala-Schonwalder, and Orestes Mas-Casals. 'A generic approach to the theory of superregenerative reception.' IEEE Transactions on Circuits and Systems I: regular papers 52.1 (2005): 54-70. [9] Yuan, Jiren, and Christer Svensson. 'High-speed CMOS circuit technique.' IEEE Journal of Solid-State Circuits 24.1 (1989): 62-70. [10] Kumar, Manish, Md Anwar Hussain, and Sajal K. Paul. 'An Improved SOI CMOS Technology Based Circuit Technique for Effective Reduction of Standby Subthreshold Leakage.' Circuits and Systems 4.06 (2013): 431. [11] Foley, Clark. 'Characterizing metastability.' Advanced Research in Asynchronous Circuits and Systems, 1996. Proceedings., Second International Symposium on. IEEE, 1996. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/77682 | - |
| dc.description.abstract | 人口老化已經成為現今社會中一大不可避免的問題，而提供給老人們適當的服務也愈顯重要。家庭用的醫療配備像是生理資訊無線接收紀錄器與居家環境偵測系統等將在可視之未來中扮演重要地位。因此，我們提出了超再生式接收機，可應用於無線上的訊號傳輸。為了分析誤碼率，我們也提出一個偵測電路整合於系統中。在最後，我們分析了超再生式接收機的操作原理，並建立了一個相關模型去嘗試解釋我們的測試成果。
整體電路均實作於聯華電子的0.18 微米製程，超再生式接收機用以解調開關鍵控訊號，其操作於 1 GHz 與1.8伏特的操作電壓。偵測電路主要由一高速計數器所構成，用以計算啟動時間的時間長度。我們藉由 TSPC (true single-phase clocked) 架構來實現數位電路。偵測電路也跟超再生式接收機一樣，操作於 1 GHz 與1.8伏特的操作電壓。 最後，我們探討超再生式接收機的操作原理，進一步建立了統計上的模型，來模擬壓控振盪器的暫態表現。藉此，我們可以得到超再生式接收機的最佳訊號偵測點，以達到最低的誤碼率。 | zh_TW |
| dc.description.abstract | Population aging has become an inevitable issue recently, making provide proper services for the elderly an urgent need. Homecare services like wireless recording for personal physiological information and home-based environmental monitoring system will become more and more important in the visual future. Therefore a super-regenerative receiver for biomedical applications is purposed. For bit error rate analysis, a detecting circuit is also integrated. In the end, we analyze the fundamental principle of a super-regenerative receiver and create a model to fit the result.
Our circuit is implemented and fabricated in UMC standard 0.18um CMOS process. The super-regenerative receiver is to demodulate on-off keying signals. It operates at 1G Hz and 1.8 Volt of supply voltage. The detecting circuit mainly comprise a high speed counter, used to calculate the span of the start-up time. We use true single-phase clocked logic as our circuit structure. It also operates at 1G Hz and 1.8 Volt of supply voltage. In the last part, we focus on basic principle of super-regenerative receiver. Furthermore to create a statistical model, fitting transient behavior of a voltage controlled oscillator. Thereby, we can derive the optimal signal detection point of the super-regenerative receiver, and achieve minimum bit error rate. | en |
| dc.description.provenance | Made available in DSpace on 2021-07-10T22:15:38Z (GMT). No. of bitstreams: 1 ntu-106-R04943073-1.pdf: 3642716 bytes, checksum: 8e3d09bb80b7e21a93625344751a991c (MD5) Previous issue date: 2017 | en |
| dc.description.tableofcontents | CONTENTS
口試委員會審定書 i 誌謝 iii 中文摘要 v ABSTRACT vii CONTENTS ix List of Figures xii Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis organization 1 Chapter 2 A 1GHz Low Power Super-Regenerative Receiver 2 2.1 Introduction 2 2.2 Theory of super-regenerative receiver 4 2.3 The proposed receiver structure 9 2.3.1 System architecture 9 2.4 Circuit implementation 11 2.4.1 Low-noise amplifier (LNA) 11 2.4.2 LC-VCO with a 4-bit switched-capacitor array 14 2.4.3 Envelope detector 17 2.4.4 Comparator 19 2.4.5 Pulse width detector (PWD) 20 2.5 Simulation and Measurement Results 24 Chapter 3 A VCO Start-up Time Detecting Environment 28 3.1 The proposed circuit structure 28 3.2 Circuit logic 30 3.2.1 Complementary CMOS circuit design 30 3.2.2 True single-phase clocked logic technique 32 3.3 General considerations in the dynamic CMOS design 35 3.3.1 Charge sharing 35 3.3.2 Charge leakage 36 3.3.3 Internal Race 37 3.4 Circuit implementation 39 3.4.1 True single-phase clocked asynchronous counter 39 3.4.2 Latch based clock gating circuit 44 3.4.3 Single pulse generator 45 3.5 Simulation results 47 3.5.1 True single-phase clocked asynchronous counter 47 3.5.2 Latch based clock gating circuit 49 3.5.3 Single pulse generator 50 3.5.4 System results 51 Chapter 4 Uncertainty Analysis for Super-Regenerative Receiver 53 4.1 Basic oscillation mechanism 53 4.2 Probability distribution of start-up time 60 4.2.1 Physical phenomenon 60 4.2.2 Statistical model for start-up time 62 4.3 Optimal super regenerative receiver 67 4.3.1 Decision point of optimal receiver 68 4.3.2 Proof of the optimal decision point 71 4.4 System Measurement Results 72 Chapter 5 Conclusion 75 References 76 | |
| dc.language.iso | en | |
| dc.subject | 啟動時間 | zh_TW |
| dc.subject | 超再生式接收機 | zh_TW |
| dc.subject | 誤碼率 | zh_TW |
| dc.subject | 開關鍵控 | zh_TW |
| dc.subject | 壓控振盪器 | zh_TW |
| dc.subject | voltage controlled oscillator | en |
| dc.subject | super-regenerative receiver | en |
| dc.subject | bit error rate | en |
| dc.subject | on-off keying | en |
| dc.subject | start-up time | en |
| dc.subject | true single-phase clocked logic | en |
| dc.title | 1GHz超再生式接收機與啟動時間的統計分析 | zh_TW |
| dc.title | 1GHz Super-Regenerative Receiver and Statistical Analysis on Start-up Time | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 105-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 孫台平(Tai-Ping Sun),彭盛裕(Sheng-Yu Peng),孟慶宗(Chin-Chun Meng) | |
| dc.subject.keyword | 超再生式接收機,誤碼率,開關鍵控,啟動時間,壓控振盪器, | zh_TW |
| dc.subject.keyword | super-regenerative receiver,bit error rate,on-off keying,start-up time,true single-phase clocked logic,voltage controlled oscillator, | en |
| dc.relation.page | 77 | |
| dc.identifier.doi | 10.6342/NTU201703790 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2017-08-18 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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