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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/77552
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor陳怡然(Yi-Jan Chen)
dc.contributor.authorWei-Lin Laien
dc.contributor.author賴韋霖zh_TW
dc.date.accessioned2021-07-10T22:08:21Z-
dc.date.available2021-07-10T22:08:21Z-
dc.date.copyright2020-12-28
dc.date.issued2020
dc.date.submitted2020-12-11
dc.identifier.citation[1] W. Gu-Yeon and M. Horowitz, “A low power switching power supply for self-clocked system.” in Proc. Int. Symp. Low Power Electron. Des., 1996, pp. 313-317.
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[4] B. J. Patella, A. Prodic, A. Zirger, and D. Maksimovic, “High-frequency digital PWM controller IC for DC-DC converters,”IEEE Trans. Power Electron, vol. 18, no. 1, pp. 438−446, Jan. 2003.
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[8] Majd G. Batarseh, Wisam Al-Hoor, Lilly Huang, Chris Iannello and Issa Batarseh, “Segmented digital clock manager-FPGA based digital pulse width modulator technique,” in Proc. Power Electron. Spec. Conf., 2008, pp.3036−3042.
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[11] D. Navarro, O. Lucia, L. A. Barragan, J.I. Artigas, I. Urriza, “Synchronous FPGA-based high-resolution implementations of digital pulse-width modulators,” IEEE Trans. Power Electronics, vol. 27, No. 5,pp. 2515−2525, May 2012.
[12] Poki Chen, Tuo-Kuang Chen,Hsiao-Tzu Hu, Yu-Han Peng and Yi-Jin Chen, “A digital pulse width modulator based on pulse shrinking mechanism,” in IEEE PEDS, No. 433, Nov. 2009.
[13] S. Hoppner, S. Haenzsche, S. Scholze and R. Schuffny, “An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology,” in Proc. IEEE Int. Symp. Circuits Syst., pp. 1738-1741, 2015.
[14] A. Matt Francis, Jim Holmes, H.Alan Mantooh, IEEE, and Jia Di, “A Sic CMOS controlled PWM generator for high-temperature applications,” IEEE Trans. Ind. Electron., vol.64, No.10, Oct. 2017.
[15] Reng-Feng Chu, “0.18-μm CMOS Centered Digital Pulse Width Modulator,” doi: 10.6342/NTU201903769, Jan. 2019.
[16] Y. E. Wang, “An improved Kahn transmitter architecture based on delta-sigma modulation,” in IEEE MTT-S Int. Microw. Symp. Dig., vol. 3, Jun. 2003, pp. 1327-1330.
[17] J.-H. Chen, H.-S. Yang, and Y.-J. E. Chen, “A wide dynamic range technique for RF polar transmitters,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 9, pp. 2368-2374. Sep. 2010.
[18] M. Park, M. H. Perrott, and R. B. Staszewski, “A time-domain resolution improvement of an RF-DAC,” IEEE Trans. Circuits Syst. II, Exp.Briefs,vol. 57,no. 7, pp. 517–521, Jul. 2010.
[19] M. Park, M. H. Perrott and R. B. Staszewski “An amplitude resolution improvement of an RF-DAC employing pulsewidth modulation,” IEEE Trans. Circuits Syst. I, Reg. Papers,vol. 58, no. 11, pp. 2590 -2603, 2011.
[20] J.-H. Chen, H.-S. Yang, H.-C. Lin, and Y.-J. E. Chen, “A polar-transmitter architecture using multiphase pulsewidth modulation,” IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 58, no. 2, pp. 244-252, Feb. 2011.
[21] Y.-J. E. Chen, H.-S. Yang, and J.-H. Chen, “Pulse-modulated polar transmitters for spectrum-efficient wireless applications,” in Proc. IEEE Int. Wireless Symp., Mar 2014, pp. 1-4.
[22] M. T. Pasha, M. F. U. Haque, J. Ahmad, and T. Johansson, “A modified all-digital polar PWM transmitter,” IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 65, no. 2, pp. 758-768, Feb.2018.
[23] H.-S. Yang, J.-H. Chen, and Y.-J. E. Chen, “A polar transmitter using interleaving pulse modulation for multimode handsets,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 8, pp. 2083-2090, Aug. 2011.
[24] C.-W. Chang, Y.-J. E. Chen, and J.-H. Chen, “A power-recycling technique for improving power amplifier efficiency under load mismatch,” IEEE Microw. Wireless Comp. Lett., vol. 21, no. 10, pp. 571-573, Oct. 2011.
[25] Y.-S. Jeon, H.-S. Yang, and S. Nam, “A power re-use technique for improved efficiency of pulsed oscillating amplifiers,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 10, pp. 567-569, Oct. 2006.
[26] R. Langridge, T. Thornton, P. M. Asbeck, and L. E. Larson, “A power re-use technique for improved efficiency of outphasing microwave power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 47, no. 8, pp. 1467-1470, Aug 1999.
[27] Q.-W. Lin and X.-Y. Zhang, “Differential rectifier using resistance compression network for improving efficiency over extended input power range,” IEEE Trans. Microw. Theory Techn., vol. 64, no. 9, pp. 2943-2954, Sep. 2016.
[28] X. Zhang, L. Larson, P. Asbeck, and R. Langridge, “Analysis of power recycling techniques for RF and microwave outphasing power amplifiers,” IEEE Trans. Circuits Syst. II, vol. 49, no. 5, pp. 312-320, May 2002.
[29] M.-D. Wei, Y.-T. Chang, D. Wang, C.-H. Tseng, and R. Negra, “Balanced RF rectifier for energy recovery with minimized input impedance variation,” IEEE Trans. Microw. Theory Techn., vol. 65, no. 5, pp. 1598-1604, May 2017.
[30] H.-S. Yang, C.-W. Chang, and J.-H. Chen, “A highly efficient LTE pulse-modulated polar transmitter using wideband power recycling,” IEEE Trans. Microw. Theory Techn., vol. 63, no. 12, pp. 4437-4443, Dec. 2015.
[31] V. Yousefzadeh , T. Takayama and D. Maksimovic “Hybrid DPWM with digital delay-locked loop,” in Proc. IEEE Comput. Power Electron. Workshop (COMPEL), pp.142 -148, 2006.
[32] H.-H. Chang, J.-W. Lin, C.-Y. Yang, S.-I. Liu, “A wide-range delay-locked loop with a fixed latency of one clock cycle,”IEEE J. Solid-State Circuits, vol. 37, pp. 1021 –1027, Aug. 2002.
[33] J.-S. Lee, M.-S. Keel, S.-I. Lim, S. Kim, “Charge pump with perfect current matching characteristics in phase-locked loops,”IEEE Electron. Lett., vol. 36, pp. 1907 –1908, Nov. 2000.
[34] S.-E. Chang, Y.-J. E. Chen, “CMOS OOK modulator with fast envelope transient,” IEEE Electron. Lett., vol. 55, No. 17, pp. 927−928, Aug 2019.
[35] J.-H. Chen, H.-S. Yang, and Y.-J. E. Chen, “A multi-level pulse modulated polar transmitter using digital pulse-width modulation,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 5, pp. 295-297, May 2010.
[36] H. Enzinger and C. Vogel, “Analytical description of multilevel carrier-based PWM of arbitrary bounded input signals,” in Proc. IEEE Int. Symp. Circuits Syst., June 2014, pp. 1030-1033.
[37] K. Hausmair, S. Chi, and C. Vogel, “How to reach 100% coding efficiency in multilevel burst-mode RF transmitters,” in Proc. IEEE Int. Symp. Circuits Syst., May 2013, pp. 2255-2258.
[38] O. Tanovic, R. Ma, and K. H. Teo, “Theoretical bounds on time-domain resolution of multilevel carrier-based digital PWM signals used in all-digital transmitters,” in Proc. IEEE Int. Midwest Symp. Circuits Syst., Aug. 2017, pp. 1146-1149.
[39] A. Chandrakasan, W. J. Bowhill, and F. Fox, “Design of high-performance microprocessor Circuit,” New York: IEEE Press, pp. 240, 2001.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/77552-
dc.description.abstract無線通訊技術不斷地發展,已經成為日常生活不可或缺的一部分。在過去幾年之中,對無線通訊的需求呈指數增長,並且隨著遠程醫療保健,物聯網,自動駕駛汽車和虛擬實境應用的出現,無線通訊的需求將進一步增加。發射器需要更好的效能,就必須要有高峰值平均功率比、高效率、寬頻寬以及高線性度等特性。在線性高效率的架構中,脈衝調變極座標發射機架構可以同時實現高效率與高線性度。不僅如此,為了提高極發射器的效率,功率放大器的控制電路「中心式數位脈波寬度調變器」需要提供高頻率、高精準度的脈波輸出。
本論文第一部分使用TSMC 180-nm CMOS製程實作七位元中心式數位脈波寬度調變器,操作頻率為150 MHz,最小脈波寬度為52 ps,並具有相差180°雙相位輸出。最後的可量測PWM 工作範圍為6 % ~ 93%, INL落在-1.24 ~ 1.29LSB之間,DNL落在-1.03 ~ 1.07 LSB之間。
第二部分在實現雙相位脈衝調變極座標發射機上,選用了功率放大器元件、威爾金森功率結合器、前置放大器以及射頻調變器晶片,結合雙路訊號進而提高效率。量測結果顯示ACLR_Lower與ACLR_Upper分別為-30.04 dBc以及-30.23 dBc,輸出功率則可以達到20.12 dBm,DE及PAE分別為19.27 %以及18.43 %。
zh_TW
dc.description.abstractWireless communication technology is continuously evolving and has become an integral part of daily life. In the previous years, the demand for wireless communications has increased exponentially which is set to further increase with the advent of remote healthcare, internet of things, autonomous cars and virtual reality applications. If transmitter needs better performance, it must have high peak-to-average power ratio, high efficiency, wide bandwidth and high linearity characteristics. Among linear high-efficiency architectures, the pulse modulation polar transmitter architecture can achieve both high efficiency and high linearity.
The first part of this thesis proposed a 150MHz 7-bit centered DPWM using TSMC 180-nm CMOS process, and this circuit generates dual output signal with 180° phase difference. The least significant bit width is 52 ps. The measureable PWM duty cycle is 3% ~ 96%. INL is -1.24 ~ 1.29 LSB, and DNL is -1.03 ~ 1.07 LSB in measurement. The second part of this thesis proposed a dual phase pulse modulation polar transmitter, which consists of Power amplifier, Wilkinson combiner, pre-amplifier and RF modulator. By combing two paths to increase efficiency, measurement result reveals that ACLR_Lower and ACLR_Upper are -30.04 dBc and -30.23 dBc separately. The output power can achieve to 20.12 dBm, while DE and PAE are 19.27 % and 18.43 % respectively.
en
dc.description.provenanceMade available in DSpace on 2021-07-10T22:08:21Z (GMT). No. of bitstreams: 1
U0001-1012202010583700.pdf: 9627381 bytes, checksum: 16a4351e8193e7ec30657fee3f413962 (MD5)
Previous issue date: 2020
en
dc.description.tableofcontents摘要............................i
ABSTRACT.......................ii
目錄...........................iii
圖目錄..........................v
表目錄..........................xi
第一章 序論......................1
1.1 研究動機.................1
1.2 論文架構與貢獻...........3
第二章 文獻回顧..................4
2.1 數位脈衝寬度調變器........4
2.2 脈衝調變極座標發射機......11
2.2.1 發展現況...................12
2.2.2 系統需求...................16
第三章 數位脈衝寬度調變器.........17
3.1 簡介........................17
3.2 電路架構....................22
3.3 相位產生電路.................22
3.3.1 延遲鎖相迴路...............23
3.3.2 啟動控制電路...............24
3.3.3 子電路架構.................27
3.3.4 查找表.....................34
3.4 相位組合電路.................37
3.5 模擬結果.....................39
3.6 晶片量測.....................52
第四章 5G NR脈衝調變極座標發射機...64
4.1 簡介.....................64
4.2 系統設計.................66
4.2.1 脈衝調變器.................67
4.2.2 前置放大器.................74
4.2.3 功率放大器.................76
4.2.4 功率結合器.................78
4.3 系統量測.................80
4.4 討論.........................99
第五章 結論......................104
參考文獻.........................105
dc.language.isozh-TW
dc.subject脈波寬度調變器zh_TW
dc.subject功率放大器zh_TW
dc.subject極座標發射機zh_TW
dc.subject脈衝調變極座標發射機zh_TW
dc.subjectPower Amplifieren
dc.subjectpolar transmitteren
dc.subjectpulse modulation polar transmitteren
dc.subjectpulse width modulatoren
dc.title5G NR脈衝調變極座標發射機模組與雙輸出數位脈波寬度調變器zh_TW
dc.title5G NR Pulse Modulation Polar Transmitter Module and Dual Output Digital Pulse Width Modulatoren
dc.typeThesis
dc.date.schoolyear109-1
dc.description.degree碩士
dc.contributor.oralexamcommittee曹恒偉(Hen-Wai Tsao),陳昭宏(Jau-Horng Chen),楊濠瞬(Hao-Shun Yang)
dc.subject.keyword功率放大器,極座標發射機,脈衝調變極座標發射機,脈波寬度調變器,zh_TW
dc.subject.keywordPower Amplifier,polar transmitter,pulse modulation polar transmitter,pulse width modulator,en
dc.relation.page109
dc.identifier.doi10.6342/NTU202004411
dc.rights.note未授權
dc.date.accepted2020-12-14
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電子工程學研究所zh_TW
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