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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/76622完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 劉宗德 | |
| dc.contributor.author | Hao-Hsuan Wei | en |
| dc.contributor.author | 魏晧軒 | zh_TW |
| dc.date.accessioned | 2021-07-10T21:34:00Z | - |
| dc.date.available | 2021-07-10T21:34:00Z | - |
| dc.date.copyright | 2017-02-21 | |
| dc.date.issued | 2017 | |
| dc.date.submitted | 2017-01-24 | |
| dc.identifier.citation | [1] S. S. Kumar, J. Guajardo, R. Maes, G. J. Schrijen and P. Tuyls, “Extended abstract: The butterfly PUF protecting IP on every FPGA,” 2008 IEEE International Workshop on Hardware-Oriented Security and Trust, Anaheim, CA, 2008.
[2] P. Simons, E. van der Sluis and V. van der Leest, “Buskeeper PUFs, a promising alternative to D Flip-Flop PUFs,” 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, San Francisco, CA, 2012, pp. 7-12. [3] K. Lofstrom, W. R. Daasch and D. Taylor, “IC identification circuit using device mismatch,” 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), San Francisco, CA, USA, 2000, pp. 372-373. [4] B. Gassend, “Physical Random Functions” M.S. thesis, Massachusetts Institute of Technology (MIT), USA, 2003. [5] A. B. Alvarez, W. Zhao and M. Alioto, 'Static Physically Unclonable Functions for Secure Chip Identification With 1.9–5.8% Native Bit Instability at 0.6–1 V and 15 fJ/bit in 65 nm,' in IEEE Journal of Solid-State Circuits, vol. 51, no. 3, pp. 763-775, March 2016. [6] J. Li and M. Seok, 'Ultra-Compact and Robust Physically Unclonable Function Based on Voltage-Compensated Proportional-to-Absolute- Temperature Voltage Generators,' in IEEE Journal of Solid-State Circuits, vol. 51, no. 9, pp. 2192-2202, Sept. 2016. [7] L. Daihyun, J. W. Lee, B. Gassend, G. E. Suh, M. van Dijk and S. Devadas, 'Extracting secret keys from integrated circuits,' in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, no. 10, pp. 1200-1205, Oct. 2005. [8] R. Kumar and W. Burleson, 'On design of a highly secure PUF based on non-linear current mirrors,' 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Arlington, VA, 2014, pp. 38-43. [9] Q. Chen, G. Csaba, P. Lugli, U. Schlichtmann and U. Rührmair, 'The Bistable Ring PUF: A new architecture for strong Physical Unclonable Functions,' 2011 IEEE International Symposium on Hardware-Oriented Security and Trust, San Diego CA, 2011, pp. 134-141. [10] K. Yang, Q. Dong, D. Blaauw and D. Sylvester, '14.2 A physically unclonable function with BER <10−8 for robust chip authentication using oscillator collapse in 40nm CMOS,' 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers, San Francisco, CA, 2015, pp. 1-3. [11] A. Maiti, V. Gunreddy, and P. Schaumont, 'A Systematic Model to Evaluate and Compare the Performance of Physical Unclonable Functions', in Embedded Systems Design with FPGAs, pp. 245-267, P. Athanas, D. Pnevmatikatos, and N. Sklavos, Eds., Springer, 2013. [12] J. Guajardo, S.S. Kumar, GJ. Schrijen, P. Tuyls, (2007) FPGA Intrinsic PUFs and Their Use for IP Protection. In: Paillier P., Verbauwhede I. (eds) Cryptographic Hardware and Embedded Systems - CHES 2007. CHES 2007. Lecture Notes in Computer Science, vol 4727. Springer, Berlin, Heidelberg. [13] D. E. Holcomb, W. P. Burleson and K. Fu. 2007. Initial SRAM State as a Fingerprint and Source of True Random Numbers for RFID Tags. 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In Proceedings of the 9th ACM conference on Computer and communications security, pages 148-160, 2002. [23] J.W. Lee, L. Daihyun, B. Gassend, G.E. Suh, M. van Dijk, and S. Devadas. “A technique to build a secret key in integrated circuits for identification and authentication applications,” In Symposium of VLSI Circuits, pages 176–179, 2004. [24] B. Gassend, D. Lim, D. Clarke, M. Dijk, and S. Devadas. Identification and authentication of integrated circuits. Concurr. Comput. : Pract. Exper., 16(11):1077–1098, 2004. [25] L. Lin, D. Holcomb, D. K. Krishnappa, P. Shabadi, and W. Burleson,“Low-power Sub-threshold Design of secure Physical Unclonable Functions,”in Proc. International Symposium on Low Power Electronics Design, Aug. 2010, pp. 43 –48. [26] P. Koeberl, J. Li, W. Wu (2013) A Spatial Majority Voting Technique to Reduce Error Rate of Physically Unclonable Functions. In: Bloem R., Lipp P. (eds) Trusted Systems. INTRUST 2013. Lecture Notes in Computer Science, vol 8292. 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Duinmaijer, 'Matching properties of MOS transistors,' Solid-State Circuits Conference, 1988. ESSCIRC '88. Fourteenth European, Manchester, UK, 1988, pp. 327-330. [32] P. Chen, Shen-Luan Liu and Jingshown Wu, 'A CMOS pulse-shrinking delay element for time interval measurement,' in IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 47, no. 9, pp. 954-958, Sep 2000. [33] U. Rührmair et al., 'PUF Modeling Attacks on Simulated and Silicon Data,' in IEEE Transactions on Information Forensics and Security, vol. 8, no. 11, pp. 1876-1891, Nov. 2013. [34] P. Chen et al., 'A Time-to-Digital-Converter-Based CMOS Smart Temperature Sensor, ' IEEE J. Solid-State Circuits, vol. 40, no. 8, pp. 1642-1648, Aug. 2005. [35] C.E. Yin and G. Qu, 'Temperature-aware cooperative ring oscillator PUF,' 2009 IEEE International Workshop on Hardware-Oriented Security and Trust, Francisco, CA, 2009, pp. 36-42. [36] N. Liu, S. Hanson, D. Sylvester and D. Blaauw, 'OxID: On-chip one-time random ID generation using oxide breakdown,' 2010 Symposium on VLSI Circuits, Honolulu, HI, 2010, pp. 231-232. [37] A.R. Krishna, S. Narasimhan, X. Wang, S. Bhunia, (2011) 'MECCA: A Robust Low-Overhead PUF Using Embedded Memory Array.' In: Preneel B., Takagi T. (eds) Cryptographic Hardware and Embedded Systems – CHES 2011. CHES 2011. Lecture Notes in Computer Science, vol 6917. Springer, Berlin, Heidelberg. [38] Y. Hori, H. Kang, T. Katashita and A. Satoh, 'Pseudo-LFSR PUF: A Compact, Efficient and Reliable Physical Unclonable Function,' 2011 International Conference on Reconfigurable Computing and FPGAs, Cancun, 2011, pp. 223-228. [39] M. Majzoobi, G. Ghiaasi, F. Koushanfar and S. R. Nassif, 'Ultra-low power current-based PUF,' 2011 IEEE International Symposium of Circuits and Systems (ISCAS), Rio de Janeiro, 2011, pp. 2071-2074. [40] Z. Cherif, J. L. Danger, S. Guilley and L. Bossuet, 'An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUF,' 2012 15th Euromicro Conference on Digital System Design, Izmir, 2012, pp. 156-162. [41] R. Maes, V. Rozic, I. Verbauwhede, P. Koeberl, E. van der Sluis and V. van der Leest, 'Experimental evaluation of Physically Unclonable Functions in 65 nm CMOS,' 2012 Proceedings of the ESSCIRC (ESSCIRC), Bordeaux, 2012, pp. 486-489. [42] M. D. M. Yu, R. Sowell, A. Singh, D. M'Raïhi and S. Devadas, 'Performance metrics and empirical results of a PUF cryptographic key generation ASIC,' 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, San Francisco, CA, 2012, pp. 108-115. [43] G. Kömürcü, A. E. Pusane and G. Dündar, 'Analysis of Ring Oscillator structures to develop a design methodology for RO-PUF circuits,' 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC), Istanbul, 2013, pp. 332-335. [44] M. Kalyanaraman and M. Orshansky, 'Novel strong PUF based on nonlinearity of MOSFET subthreshold operation,' 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Austin, TX, 2013, pp. 13-18. [45] M. Gao, K. Lai and G. Qu, 'A highly flexible ring oscillator PUF,' 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), San Francisco, CA, 2014, pp. 1-6. [46] C. Du and G. Bai, 'A Novel Technique for Ring Oscillator Based PUFs to Enroll Stable Challenge Response Pairs,' 2014 IEEE International Conference on Computer and Information Technology, Xi'an, 2014, pp. 270-275. [47] M. T. Rahman, D. Forte, J. Fahrny and M. Tehranipoor, 'ARO-PUF: An aging-resistant ring oscillator PUF design,' 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, 2014, pp. 1-6. [48] A. Maiti and P. Schaumont, 'The Impact of Aging on a Physical Unclonable Function,' in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 9, pp. 1854-1864, Sept. 2014. [49] Y. Cao, L. Zhang, C. H. Chang and S. Chen, 'A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications,' in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 7, pp. 1143-1147, July 2015. [50] M. T. Rahman, D. Forte, F. Rahman and M. Tehranipoor, 'A pair selection algorithm for robust RO-PUF against environmental variations and aging,' 2015 33rd IEEE International Conference on Computer Design (ICCD), New York, NY, 2015, pp. 415-418. [51] J. Chen, T. Tanamoto, H. Noguchi and Y. Mitani, 'Further investigations on traps stabilities in random telegraph signal noise and the application to a novel concept physical unclonable function (PUF) with robust reliabilities,' 2015 Symposium on VLSI Technology (VLSI Technology), Kyoto, 2015, pp. T40-T41. [52] M. Barbareschi, P. Bagnasco and A. Mazzeo, 'Supply voltage variation impact on Anderson PUF quality,' 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Naples, 2015, pp. 1-6. [53] M. S. Mispan, B. Halak, Z. Chen and M. Zwolinski, 'TCO-PUF: A subthreshold physical unclonable function,' 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Glasgow, 2015, pp. 105-108. [54] S. Mathew et al., 'A 4fJ/bit delay-hardened physically unclonable function circuit with selective bit destabilization in 14nm tri-gate CMOS,' 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), Honolulu, HI, 2016, pp. 1-2. [55] F. Zhang, S. Yang, J. Plusquellic and S. Bhunia, 'Current based PUF exploiting random variations in SRAM cells,' 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, 2016, pp. 277-280. [56] E. I. Vatajelu, G. Di Natale and P. Prinetto, 'Towards a highly reliable SRAM-based PUFs,' 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, 2016, pp. 273-276. [57] M. Majzoobi, F. Koushanfar and M. Potkonjak, 'Testing Techniques for Hardware Security,' 2008 IEEE International Test Conference, Santa Clara, CA, 2008, pp. 1-10. [58] U. Ruぴhrmair, F. Sehnke, J. Soぴlter, G. Dror, S. Devadas, and J. Schmidhuber, 'Modeling attacks on physical unclonable functions, ' in Proc. 17th ACM Conf. Comput. Commun.Security, 2010, pp. 237–249. [59] A. Vijayakumar and S. Kundu, 'A novel modeling attack resistant PUF design based on non-linear voltage transfer characteristics,' 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, 2015, pp. 653-658. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/76622 | - |
| dc.description.abstract | 一個物理上不可被複製的函數(physically unclonable function, PUF)，也就是每個晶粒(die)都具有其特有的隨機函數，可以使用在安全相關的IC應用上，包括識別、鑑定或是密鑰的產生。PUF這類的電路，產生隨機的位元(bits)，這些位元類似於矽的指紋，不同的晶粒就擁有不同的指紋，但卻可以在不同的操作環境底下穩定的重複產生好幾次，不同的操作環境包括供給電壓的改變、溫度的改變以及晶片老化的發生等等。在這篇論文中，我們將探討各種PUF電路，以及在設計PUF電路過程中的各種考量。
一開始我們會先著重在PUF的概要討論以及分類，接著我們會討論不同種的PUF如何將普通顯微鏡看不出來的物理差異放大成為我們能夠觀察以及使用的數位編碼，包括電路實現的特性或是在設計上使用的技巧等等。之後我們會探討PUF在過去所被提出來的許多不同特性，用以區別PUF所具有的特性是好是壞，以及其可用性。 最後著重在我們所提出的環形振盪器PUF，它在不同的供給電壓、溫度變化的情況，都提供了更好的穩定度。我們使用TSMC 0.18um以及TSMC 28nm製程來分析其電路行為，然後使用TSMC 28nm製程下線成晶片，未來會做成測試晶片並量測實際結果。我們所提出的環形振盪器PUF具有高度可辨識性以及高穩定度的特性，將是未來在硬體加密這方面的應用上不可或缺的角色。 | zh_TW |
| dc.description.abstract | A Physical Unclonable Function (PUF) is a die specific random function that can be used in a number of secure IC applications including identification/authentication and key generation. PUF is a circuit that generates random bits. These bits are like a silicon fingerprint, unique across dies, but can be reliably reproduced multiple times on a die across different operation condition, including voltage and temperature variations and aging. In this thesis, we discuss various aspects of a PUF design, with an emphasis on design considerations of PUF circuits.
We first give an extensive overview and classification of PUF implementations, focusing on intrinsic PUFs. We discuss significant subclasses, implementation properties and general design techniques used to amplify sub-microscopic physical distinctions into observable digital response vectors. We survey useful properties attributed to PUFs. We then study different PUF properties which have been proposed over time. Finally, a ring oscillator(RO) PUF is proposed that provides better stability against supply voltage and temperature variation. We analyze the behavior of a RO PUF in 0.18 um and 28 nm CMOS technology nodes, respectively. Furthermore, the proposed RO PUF design has been implemented on a test chip and will be fabricated in 28 nm CMOS technology. The strong identification capabilities and high reliability offered by the proposed PUF circuit makes it a promising candidate for future applications requiring secure hardware cryptographic primitives. | en |
| dc.description.provenance | Made available in DSpace on 2021-07-10T21:34:00Z (GMT). No. of bitstreams: 1 ntu-106-R02943050-1.pdf: 4744130 bytes, checksum: aac0219c2160856889263f89de155958 (MD5) Previous issue date: 2017 | en |
| dc.description.tableofcontents | 序言與謝辭 1
摘要 2 Abstract 3 圖片列表 4 表格列表 8 縮寫列表 9 1. 引言 10 1.1. 現實世界中的信任與安全性 10 1.2. 資訊安全 10 1.3. 物理的安全性與信任的根基 11 2. Physically Unclonable Functions (PUF) 14 2.1. 介紹 Physically Unclonable Functions 14 2.2. PUF的種類 16 2.2.1. 弱PUF模型 16 2.2.2. 強PUF模型 17 2.3. 弱PUF架構 18 2.3.1. SRAM PUF 18 2.3.2. Latch, Flip-flop, Butterfly, Buskeeper PUF 20 2.3.3. ICID 23 2.3.4. RO PUF 23 2.3.5. INV PUF、SA PUF 25 2.3.6. PTAT PUF 26 2.4. 強PUF架構 27 2.4.1. Arbiter-Base PUF 27 2.4.2. 非線性電流鏡PUF 29 2.4.3. 雙穩態環形PUF 31 2.4.4. 振盪瓦解PUF 33 3. PUF的重要性質 35 3.1. PUF量測維度 35 3.2. 關於PUF重要的參數 36 3.2.1. 唯一性 36 3.2.2. 穩定性 36 3.2.3. 均勻性 38 3.2.4. 位元混疊性 38 3.3. 現有PUF架構的比較 39 3.3.1. 雙穩態弱PUF比較 39 3.3.2. 其餘弱PUF比較 42 3.3.3. 強PUF比較 44 3.4. 現有PUF架構的比較圖表 46 4. PUF現有的改良方法 48 4.1. 時間上的多數決(temporal majority voting) 48 4.2. 空間上的多數決(spatial majority voting) 50 4.3. 預燒(burn-in) 52 4.4. 黑位元(dark bits)辨識 53 4.5. k取1(1-out-of-k) 54 4.6. 基底偏壓(body bias) 55 4.7. PTAT和CTAT電路補償 56 5. 我們所提出的PUF改良方式 59 6. 模擬結果與探討 65 7. 結論與未來改進的方向 74 8. 參考文獻 76 | |
| dc.language.iso | zh-TW | |
| dc.title | 應用於物聯網之高穩定度與寬操作區域之物理不可被複製函數之設計 | zh_TW |
| dc.title | Design of Wide Range and High Stability PUF for IoT Applications | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 105-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 盧奕璋,鄭振牟 | |
| dc.subject.keyword | 環形振盪器,物理不可被複製函數,晶片辨識,穩定性,硬體識別,硬體安全,物聯網, | zh_TW |
| dc.subject.keyword | Ring oscillator(RO),Physically Unclonable Function(PUF),chip identification,stability,hardware authentication,hardware security,the Internet of Things(IoT), | en |
| dc.relation.page | 83 | |
| dc.identifier.doi | 10.6342/NTU201700095 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2017-01-24 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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