基於氮化鎵之多通道鰭式場效電晶體的三維模擬分析與優化

Abstract

在本篇論文中，針對了高功率、高頻的多通道三閘極氮化鎵氮化 鋁鎵之高電子遷移率電晶體在設計上的優化。眾所皆知，近年來鰭 式場效電晶體的應用在元件微縮下的表現都能有效的降低短通道效 應。但是這種結構在氮化鎵氮化鋁鎵的電晶體中存在著二維電子氣 形成的問題，由於這種高載子遷移率的二維電子氣是透過材料本身 的極化效應形成的，而在鰭式場效電晶體結構中，側壁方向是沒有 極化場存在的，所以減少了傳輸通道中二維電子氣的總量。因此， 雖然鰭式場效電晶體的結構能有效的降低短通道效應，卻也犧牲了 部分的載子傳輸。所以有人提出利用多層的氮化鎵氮化鋁鎵異質結 構形成的多通道結構，來補償因寬度縮減而減少的載子傳輸量。 在第三章中、透過模擬，來探討在氮化鋁鎵中摻雜濃度的影響。 由於二維電子氣是透過極化場以及表面狀態來形成的，所以為了增 加二維電子氣的總量，額外的載子來源如摻雜是必須的。同時多層 異質結構中，氮化鎵傳輸層的厚度也會影響極化場分佈，進而影響 二維電子氣的形成以及其在每一層通道中的分佈。再者、經由模擬 不同鰭寬來去探討其對多通道元件的影響，並且找出常態關閉元件 的條件，以及對電性影響。綜合以上的設計議題探討，找出優化的 設計方向。 在本篇論文的結果中，透過三維模擬我們討論了優化設計的多 通道鰭式場效電晶體的表現以及熱效應的影響。在鰭寬等於40奈米 時、元件能達到常態關閉，且在最大電導值的表現上對比單通道的 鰭式場效電晶體提升了3.2倍。同時常態關閉的四通道元件與傳統 平面結構元件相比也維持了高的導通電流且很好的抑制了短通道效 應。

In this dissertation, the design of multi-channels tri-gate AlGaN/GaN high-electron-mobility transistors (HEMTs) is optimized for high-power and high-frequency applications. The application of FinFET structure has reduced the short channel effect as device shrinks. But the sidewall depletion of two dimensional electron gas reduces the current density is another issue to be overcome. Using multiple AlGaN/GaN heterostructures has been proposed to compensate the current loss from the channel width. The 2DEG of the GaN HEMT is induced by the polarization charge difference at AlGaN/GaN interface. The source of 2DEG are generally believed to be coming from the surface state. To generate more 2DEG for multi-channel structures, the modulation doping to pro- vide additional carrier source is needed. In addition, the thickness of GaN channel layer between the top and bottom AlGaN layers affects the carrier distribution and performance of the device as well. Thus, different doping density and thickness of GaN configuration were simulated to find the optimized design. Furthermore, different fin width of device with different number of channel are simulated to investigate the changes of transconductance curve. With a full 3D FEM modeling on carrier transport and heating issues, the optimized design for multi-channel FinFETs was discussed. With a proper design, the optimized normally-on four channel transistor shows 3.2 times higher maximum transconductance (gm,max), as compared to single channel tri-gate device. The on-current is compatible to planar structure while keeping the device to be operated at enhance mode with the suppression of short channel effects.