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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳中平 | |
dc.contributor.author | Hsin-Huan Chen | en |
dc.contributor.author | 陳心歡 | zh_TW |
dc.date.accessioned | 2021-06-17T08:18:17Z | - |
dc.date.available | 2029-08-31 | |
dc.date.copyright | 2019-08-18 | |
dc.date.issued | 2019 | |
dc.date.submitted | 2019-08-14 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/74056 | - |
dc.description.abstract | 近年來,為了實現低輸入電壓下的快速暫態響應,越來越多的應用傾向使用數位線性穩壓器。然而,由於一般數位線性穩壓器常採用同步控制,在每段時間周期下移位暫存器只能打開或關閉一個功率電晶體,因此其暫態響應將會被工作頻率所限制。若要提高暫態響應的效率,唯有提供更高的工作頻率。但在提高工作頻率的同時,相對的靜態電流也會跟著提升。
有鑑於此,本論文提出一個具快速動態電壓調節應用於電源管理之數位線性穩壓器,在180奈米製程下實作。該設計採用非同步控制來降低靜態電流,並在提升工作頻率的同時不會犧牲暫態響應,使該數位線性穩壓器實現動態電壓調節。其負載電流切換為490mA,輸入電壓範圍為1.2V至2V,輸出電壓範圍為1.15V至1.95V。在電壓調節達到穩定狀態時,最小靜態電流可降至2.55uA。另外,所提出的D-LDO實現了0.06mV / mA的負載調節。 | zh_TW |
dc.description.abstract | The digital low dropout voltage regulator(DLDO) gets significant attention due to its low voltage operation capability and process scalability. Usually, a synchronous control mechanism w ill be adopted in conventional DLDO designs. With synchronous control, the shift register could only turn on or off one power transistor in one single clock cycle. The transient response will be limited by operating frequency. With the operating frequency increased, the quiescent current consumption will also be increased.
A 200 MHz digital low dropout regulator with dynamic voltage scaling for power management is proposed in this paper. The design uses a synchronous control method to reduce quiescent current consumption and boost the operating frequency without sacrificing transient response, allowing the DLDO to achieve for dynamic voltage scaling Measurements using a 180nm CMOS prototy pe chip show a load current is switched 490mA, an input voltage rang e of 1.2V to 2V, and an output voltage range of 1.15V to 1.95V. With a voltage regulation up to steady state, the minimum quiescent current can be reduced to 2.55uA. Besides , the proposed D LDO achieves a load regulation of 0.06 mV / mA. | en |
dc.description.provenance | Made available in DSpace on 2021-06-17T08:18:17Z (GMT). No. of bitstreams: 1 ntu-108-R04943165-1.pdf: 1602390 bytes, checksum: 542367e9dc727a479cca310a34a96180 (MD5) Previous issue date: 2019 | en |
dc.description.tableofcontents | 1. Introduction 1
1.1 Overview 1 1.2 LDO 2 1.2.1 Analog-LDO 2 1.2.2 Digital-LDO 3 1.3 Thesis Organization 5 2. Fundamental of Low-dropout Regulator 6 2.1 Operation of LDO 7 2.2 Specifications of LDO 9 2.2.1 Dropout Voltage 9 2.2.2 Quiescent Current 11 2.2.3 Line Regulation and Load Regulation 12 2.2.4 Transient Response 13 2.2.5 Efficiency 15 3 A 200-MHz Digital Low-dropout Regulator with Dynamic Voltage Scaling for Power Management 17 3.1 Motivation 18 3.2 Circuit Description 19 3.2.1 Asynchronous Digital Controller (ADCL) 20 3.2.2 Asynchronous Control Cell (ACC) and Comparator 23 3.2.3 Heading Reflector (HR) and Terminal Reflector (TR) 25 3.3 Proposed ADCL Control Method 26 4. Simulation and Experimental Results 31 4.1 Simulation Results 32 4.2 Simulation Results Summary and Comparison 36 4.3 Experimental Results 37 4.3.1 Measurement Setup 37 4.3.2 Experimental Results 38 5. Conclusion and Future Work 43 4.1 Conclusion 44 4.2 Future Work 45 Bibliography 46 | |
dc.language.iso | en | |
dc.title | 具快速動態電壓調節於電源管理之兩億赫茲數位線性穩壓器 | zh_TW |
dc.title | A 200-MHz Digital Low-dropout Regulator with Dynamic Voltage Scaling for Power Management | en |
dc.type | Thesis | |
dc.date.schoolyear | 107-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 林宗賢,林景源,邱煌仁 | |
dc.subject.keyword | 數位控制,數位線性穩壓器,快速暫態響應,動態電壓調整,低靜態電流, | zh_TW |
dc.subject.keyword | digital control,digital low dropout regulator(DLDO),fast transient response,dynamic voltage scaling(DVS),low quiescent current, | en |
dc.relation.page | 49 | |
dc.identifier.doi | 10.6342/NTU201903396 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2019-08-14 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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