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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 李嗣涔(Si-Chen Lee) | |
| dc.contributor.author | Kai-Wen Yu | en |
| dc.contributor.author | 余凱文 | zh_TW |
| dc.date.accessioned | 2021-06-17T07:11:59Z | - |
| dc.date.available | 2019-07-24 | |
| dc.date.copyright | 2019-07-24 | |
| dc.date.issued | 2019 | |
| dc.date.submitted | 2019-07-18 | |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/72964 | - |
| dc.description.abstract | 本論文使用機械剝離法分離出擁有奈米級厚度的二硫化鎢並利用二氧化矽基板製作出薄膜電晶體。利用光學顯微鏡及原子力顯微鏡的搭配，篩選出較佳厚度範圍的二硫化鎢。二硫化鎢薄膜電晶體的歐姆接觸可以通過高功函數金屬鎳代替低功函數金屬鉻來實現。很明顯地，通過使用鎳金屬電極代替鉻金屬電極，可以將二硫化鎢薄膜電晶體的接觸電阻從231Ω.mm減小到79Ω.mm。為了進一步提高遷移率和降低遲滯特性，二氧化矽基板被六方氮化硼基板取代，因為六方氮化硼具有原子級光滑的表面，相對沒有懸浮鍵，電荷陷阱並且是自然平坦的，可以改善二硫化鎢和氧化層界面之間的性質。對於二氧化矽基板上的薄膜電晶體，其遷移率為38.4cm2 / V-sec，對於六方氮化硼基板上的薄膜電晶體，其遷移率為68.6cm2 / V-sec。對於二氧化矽基板上的薄膜電晶體，遲滯為106V，對於六方氮化硼基板上的TFT，遲滯為12V。二硫化鎢薄膜電晶體在六方氮化硼基板上的最高遷移率為103.4 cm2 / V-s，遲滯為23 V。
除了薄膜電晶體之外，p-n接面是二硫化鎢的另一種應用。為了製造p-n接面，可以用異質接面實現。採用雙極性的二維材料二硒化鎢作為p型，並與n型二硫化鎢結合以製造二硫化鎢-二硒化鎢異質接面。其整流比為4.48×104，理想因子為1.83，代表二硫化鎢-二硒化鎢異質接面是一個真正的p-n接面。最後，使用窄頻的雷射光作為光源測量光學特性。其外部量子效率為3.3％，填充因子為34.8％。 | zh_TW |
| dc.description.abstract | In this thesis, the mechanically exfoliated 2D material WS2 nanosheet was successfully used to fabricate thin film transistor (TFT) on SiO2 substrate. Using optical microscopy and atomic force microscopy, the WS2 flakes with appropriate thickness can be chosen. Ohmic contact of WS2 TFT can be achieved by high work function metal Nickel instead of low work function metal Chromium. It is obvious that it can reduce the contact resistance from 231 Ω.mm to 79 Ω.mm of WS2 TFT by using Ni/Au contact instead of Cr/Au contact. In order to further improve the mobility and reduce the hysteresis, the SiO2 substrate was replaced by h-BN substrate because h-BN has an atomically smooth surface that is relatively free of dangling bonds, charge traps and is naturally flat which can improve the interface property between WS2 and oxide layer. The mobility is 38.4 cm2/V-sec for TFT on SiO2 substrate and 68.6 cm2/V-sec for TFT on h-BN substrate. The hysteresis is 106 V for TFT on SiO2 substrate and 12 V for TFT on h-BN substrate. The highest mobility of WS2 TFT on h-BN substrate is 103.4 cm2/V-s and the hysteresis is 23 V.
Apart from the TFT, p-n junction is another application of WS2. In order to fabricate the p-n junction, heterostructure could be applied. Tungsten diselenide (WSe2) which is ambipolar 2D material was adopted as a p region and combine with n-type WS2 to fabricate WSe2-WS2 heterostructure p-n junction. The rectification ratio is 4.48 × 104 and its ideality factor is 1.83, which means that WSe2-WS2 heterostructure is a real p-n junction. Finally, the laser pointer which is narrowband light source is used to measure optical properties. The EQE is 3.3% and the fill factor is 34.8%. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-17T07:11:59Z (GMT). No. of bitstreams: 1 ntu-108-R06943108-1.pdf: 3704345 bytes, checksum: a65f10e5b0f75f15f2ac3b2044e75c65 (MD5) Previous issue date: 2019 | en |
| dc.description.tableofcontents | 中文口試委員審定書 i
致謝 ii 摘要 iii ABSTRACT v CONTENTS vii LIST OF FIGURES xii LIST OF TABLES xviii Chapter 1 Introduction 1 1.1 Overview of Tungsten Disulfide 1 1.2 Advantages of WS2 FETs 7 1.3 Motivation 11 Chapter 2 Experiments 13 2.1 Heterostructure Fabrication System 13 2.2 Measurement Techniques 17 2.2.1 Atomic Force Microscopy (AFM) 17 2.2.2 Raman Spectroscopy 18 2.2.3 Photoluminescence (PL) 19 2.2.4 Photoemission Spectroscopy (PES) 19 2.2.5 Current-Voltage Characteristics 22 2.3 Rapid Thermal Annealing (RTA) 23 Chapter 3 Material Analysis for WS2 24 3.1 Substrate Preparation 24 3.2 Preparation of Exfoliated WS2 24 3.3 Characterization of WS2 Film Thickness 25 3.3.1 Optical Microscopy 26 3.3.2 Atomic Force Microscopy (AFM) 28 3.4 Optical and Vibrational Properties of WS2 30 3.4.1 Raman Spectroscopy 30 3.4.2 Photoluminescence(PL) 34 3.5 Photoemission Spectroscopy (PES) 37 3.5.1 X-ray Photoelectron Spectroscopy(XPS) 37 3.5.2 XPS spectra of WS2 38 3.5.3 Ultraviolet photoelectron spectroscopy (UPS) 39 3.5.4 Work Function of WS2 41 Chapter 4 WS2 Thin Film Transistors 43 4.1 WS2 Back-gated TFTs using Cr/Au Contact and SiO2 Substrate 43 4.1.1 Device Process Flow 43 4.1.2 Device Performance 46 4.2 Transfer Length Method (TLM) Measurement for different metal contacts 50 4.2.1 Device Process Flow 50 4.2.2 Device Performance 52 4.3 Nickel contact and h-BN Substrate for Back-Gated WS2 TFTs 56 4.3.1 Device Process Flow 56 4.3.2 Device Performance 59 4.4 Comparison between SiO2 and h-BN Substrate 62 4.4.1 Device Process Flow 62 4.4.2 Device Performance 64 4.5 WS2-WSe2 Heterostructure 68 4.5.1 Device Process Flow 68 4.5.2 Electrical Properties of Heterostructure 71 4.5.3 Optical Properties of Heterostructure 76 Chapter 5 Conclusions 80 References 82 | |
| dc.language.iso | en | |
| dc.title | 二硫化鎢薄膜電晶體與二硫化鎢-二硒化鎢異質接面特性探討 | zh_TW |
| dc.title | Study of WS2 TFT and WS2- WSe2 Heterostructure | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 107-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 林浩雄(Hao-Hsiung Lin),林時彥(Shih-Yen Lin),吳肇欣(Chao-Hsin Wu) | |
| dc.subject.keyword | 二硫化鎢薄膜電晶體,六方氮化硼,高功函數金屬接觸,二硫化鎢-二硒化鎢異質接面, | zh_TW |
| dc.subject.keyword | tungsten disulfide (WS2) thin film transistor (TFT),hexagonal boron nitride (h-BN),high work function metal contact,WS2-WSe2 heterostructure, | en |
| dc.relation.page | 92 | |
| dc.identifier.doi | 10.6342/NTU201901636 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2019-07-19 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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