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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳中平(Chung-Ping Chen) | |
dc.contributor.author | Bo-Yin Cheng | en |
dc.contributor.author | 鄭博尹 | zh_TW |
dc.date.accessioned | 2021-06-17T06:59:22Z | - |
dc.date.available | 2019-08-07 | |
dc.date.copyright | 2019-08-07 | |
dc.date.issued | 2019 | |
dc.date.submitted | 2019-08-05 | |
dc.identifier.citation | [1] Mattingly, Doug. 'Designing stable compensation networks for single phase voltage mode buck regulators.' Intersil Technical Brief, pp. 1-10, 2003.
[2] Oliva, Alejandro R., Simon S. Ang, and Gustavo Eduardo Bortolotto. 'Digital control of a voltage-mode synchronous buck converter.' IEEE Transactions on Power Electronics 21.1, pp. 157-163, 2006. [3] Lee, Cheung Fai, and Philip KT Mok. 'A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique.' IEEE journal of solid-state circuits 39.1, pp. 3-14, 2004. [4] Sheehan, R. 'Current-Mode Modeling for Peak, Valley and Emulated Control Methods-Reference Guide for Fixed-Frequency, Continuous Conduction-Mode Operation.' National Semiconductor, http://www. techonline. com (2007). [5] Wey, Chin-Long, et al. 'A fast hysteretic buck converter with adaptive ripple controller.' 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2012. [6] Wu, Xiaohui, and Xiaobo Wu. 'Adaptive hysteresis window control (AHWC) technique for hysteretic DC-DC buck converter with constant switching frequency.' 2010 Asia-Pacific Power and Energy Engineering Conference. IEEE, 2010. [7] Sahu, Biranchinath, and Gabriel A. Rincon-Mora. 'An accurate, low-voltage, CMOS switching power supply with adaptive on-time pulse-frequency modulation (PFM) control.' IEEE Transactions on Circuits and Systems I: Regular Papers 54.2, pp. 312-321, 2007. [8] Yanming, Li, et al. 'A current-mode buck DC-DC controller with adaptive on-time control.' Journal of Semiconductors 30.2 (2009): 025007. [9] Shi, Ling-Feng, and Ling-Yan Xu. 'Frequency compensation circuit for adaptive on-time control buck regulator.' IET Power Electronics 7.7, pp. 1805-1809, 2014. [10] Li, Yan-Ming, et al. 'Fixed-frequency adaptive off-time controlled buck current regulator with excellent pulse-width modulation and analogue dimming for light-emitting diode driving applications.' IET Power Electronics 8.11, pp. 2229-2236, 2015. [11] Robert W. Erickson, Dragan Maksimovic, “Fundamentals of Power Electronics,” 2nd Edition, 2000. [12] 梁適安,交換式電源供應器之理論與實務設計,二版,全華科技圖書,2008。 [13] 'Efficiency of Buck Converter : Power Management', ROHM semiconductor, http://rohmfs.rohm.com/en/products/databook/applinote/ic/power/switching_regulator/buck_converter_efficiency_app-e.pdf. [14] Mickael Lauer 'Power Topology – Buck Converter.' Texas Instruments, Application report SLVA432–August 2010. [15] Xiao, Jinwen, et al. 'A 4-μA quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications.' IEEE Journal of Solid-State Circuits 39.12, pp. 2342-2348, 2004. [16] Liou, Wan-Rone, Mei-Ling Yeh, and Yueh Lung Kuo. 'A high efficiency dual-mode buck converter IC for portable applications.' IEEE Transactions on Power Electronics 23.2, pp. 667-677, 2008. [17] Yuan, Bing, et al. 'Switch size control circuit in wide-load PWM/PFM DC-DC buck converters.' 2016 International Symposium on Integrated Circuits (ISIC). IEEE, 2016. [18] Yeh, Chia-An, and Yen-Shin Lai. 'Novel hybrid control technique with constant on/off time control for DC/DC converter to reduce the switching losses.' 2009 International Conference on Power Electronics and Drive Systems (PEDS). IEEE, 2009. [19] Chiang, Chu-Yi, and Chern-Lin Chen. 'Zero-voltage-switching control for a PWM buck converter under DCM/CCM boundary.' IEEE Transactions on Power Electronics 24.9, pp. 2120-2126, 2009. [20] 詹子增,「雙模式降壓型功率因數修正器之研製」,國立台灣科技大學電子工程系研究所碩士論文,民國103年。 [21] Razavi, Behzad. Design of analog CMOS integrated circuits, 2000. [22] P.-J. Liu, et al., “A high-efficiency CMOS DC-DC converter with 9-μs transient recovery time,” IEEE Trans. Circuits and Systems-I: Regular Papers, vol. 59, no. 3, pp. 575-583, Mar. 2012. [23] Lee, Yu-Huei, et al. 'Fast transient (FT) technique with adaptive phase margin (APM) for current mode DC-DC buck converters.' IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20.10, pp. 1781-1793, 2011. [24] Chen, Jiann-Jong, et al. 'A new fast-response current-mode buck converter with improved I2 -controlled techniques.' IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26.5, pp. 903-911, 2018. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/72452 | - |
dc.description.abstract | 本論文的目的是設計出一個新的截止時間控制電路並將它運用在直流直流降壓轉換器,本論文提出的截止時間控制電路可以讓直流直流降壓轉換器在寬輸入電壓範圍皆可以得到較低的切換頻率,藉此降低系統的切換損耗以得到較高的效率。另外在固定輸入電壓的情形針對不同的負載時,也採用了雙模式設計。當電路處於重載時,電路會操作於連續導通模式。當電路處於輕載時,會使用波谷切換技術使電路會持續操作在邊界導通模式而不會進入不連續導通模式,透過降低切換時功率電晶體的跨壓以降低輕載操作時的切換損失。
本次設計的控制晶片是採用TSMC 0.35μm 2P4M CMOS製程,晶片面積為2.174mm2,搭配外加的功率電晶體和被動元件,建構出一個非同步降壓轉換器。本系統的輸入電壓範圍為4.5V~5.4V,輸出電壓為1.8V,輸出電流範圍為0A至1A。根據量測結果,在連續導通模式下,可以在寬輸入電壓範圍達到0.33%效率的提升。在邊界導通模式下,相較於不連續導通模式也可以達到0.25%效率的提升。 | zh_TW |
dc.description.abstract | The purpose of this thesis is to design a new off-time control method and apply it to a DC-DC buck converter. The off-time controlled circuit proposed in this thesis can make the DC-DC buck converter get the lower switching frequency for wide input voltage range. Thereby reducing the switching loss of the system to achieve higher efficiency. In addition, when the input voltage is fixed for different loads, a dual-mode design is also adopted. When the circuit is under heavy load, the circuit operates in continuous-conduction mode. When the circuit is under light load, valley switching technique is used to keep the circuit in boundary-conduction mode without entering discontinuous-conduction mode. The switching loss at light load is reduced by reducing the voltage across the power transistor during switching.
The proposed chip is fabricated using TSMC 0.35μm 2P4M CMOS process with an area of 2.174mm2. With an additional power transistor and passive components, an asynchronous buck converter is constructed. The input voltage range is from 4.5V to 5.4V. The output voltage is 1.8V. The load current range is from 0 to 1A. According to the measurement results, in the continuous-conduction mode, the efficiency can be improved by 0.33% for wide input voltage range. In the boundary-conduction mode, an efficiency improvement of 0.25% can be achieved compared to the discontinuous-conduction mode. | en |
dc.description.provenance | Made available in DSpace on 2021-06-17T06:59:22Z (GMT). No. of bitstreams: 1 ntu-108-R05943126-1.pdf: 9987468 bytes, checksum: 96106b9ac20b92e9dfaf060da6eb2383 (MD5) Previous issue date: 2019 | en |
dc.description.tableofcontents | 口試委員會審定書 #
誌謝 I 摘要 III Abstract V Contents VII List of Figures IX List of Tables XXI Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Organization 3 Chapter 2 Buck Converter Principle 5 2.1 Basic of Buck Converter 5 2.2 Efficiency of Buck Converter 10 2.3 Control Methods of Buck Converter 14 2.3.1 Voltage-mode Buck Converter 14 2.3.2 Current-mode Buck Converter 16 2.3.3 On-time Controlled Buck Converter 18 2.3.4 Off-time Controlled Buck Converter 20 2.3.5 Method Comparison 21 Chapter 3 Dual-mode Buck Converter 23 3.1 Proposed Off-time Generator 24 3.2 Dual-mode Control 29 3.3 Peak-current Mode Control 36 Chapter 4 Circuit Implementations 39 4.1 Specification 39 4.2 Component Design 41 4.3 Simulation Results 49 4.4 Layout 67 4.5 Die Photo 67 Chapter 5 Measurement Results 69 5.1 Experimental Waveforms 70 5.2 Experimental Data 95 5.3 Result Analysis 104 5.4 Comparison 106 Chapter 6 Conclusions and Prospect 109 6.1 Conclusions 109 6.2 Prospect 110 Reference 113 | |
dc.language.iso | en | |
dc.title | 具寬輸入電壓範圍低切換損耗之雙模式降壓轉換器 | zh_TW |
dc.title | A Dual-Mode Buck Converter with Low Switching Loss for Wide Input Voltage Range | en |
dc.type | Thesis | |
dc.date.schoolyear | 107-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 林宗賢(Tsung-Hsien Lin),林景源(Jing-Yuan Lin),邱煌仁(Huang-Jen Chiu) | |
dc.subject.keyword | 切換頻率,截止時間控制,邊界導通模式,波谷切換,雙模式, | zh_TW |
dc.subject.keyword | Switching frequency,off-time control,boundary-conduction mode,valley switching,dual mode, | en |
dc.relation.page | 116 | |
dc.identifier.doi | 10.6342/NTU201902306 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2019-08-05 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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