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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳信樹(Hsin-Shu Chen) | |
dc.contributor.author | Chi-Wei Chen | en |
dc.contributor.author | 陳其蔚 | zh_TW |
dc.date.accessioned | 2021-06-17T06:11:26Z | - |
dc.date.available | 2018-10-31 | |
dc.date.copyright | 2018-10-31 | |
dc.date.issued | 2018 | |
dc.date.submitted | 2018-10-27 | |
dc.identifier.citation | Reference
[1] M. D. Seeman and S. R. Sanders, “Analysis and optimization of switched-capacitor dc–dc converters,” IEEE Transactions on Power Electronics, vol. 23, no. 2, pp. 841-851, Mar. 2008. [2] V. W. Ng and S. R. Sanders, “Switched capacitor dc–dc converter: superior where the buck converter has dominated,” Ph.D. dissertation, EECS Dept., UC Berkeley Univ., Berkeley, CA, USA, 2011. [3] A. K. Mal and R. Todani, “Non overlapping clock (NOC) generator for low frequency switched capacitor circuits,” IEEE Technology Students' Symposium, Kharagpur, pp. 226-231, 2011. [4] M. D. Seeman, “A design methodology for switched-capacitor dcdc converters,” EECS Dept., UC Berkeley Univ., Berkeley, CA, USA, 2009. [5] Y. Ramadass and A. Chandrakasan, “Voltage scalable switched capacitor dc-dc converter for ultra-low-power on-chip applications,” IEEE Power Electronics Specialists Conference, pp. 2353-2359. Jun, 2007. [6] Y. K. Ramadass, “Energy processing circuits for low-power applications,” Jun. 2009. [7] L. G. Salem and P. P. Mercier, “A recursive switched-capacitor dc-dc converter achieving 2-1 ratios with high efficiency over a wide output voltage range,” IEEE J. Solid-State Circuits, vol. 49, no.12, pp. 2773–2787, Dec. 2014 [8] T. M. Andersen, F. Krismer, J. W. Kolar, T. Toifl, C. Menolfi, L. Kull, T. Morf, M. Kossel, M. Brandli, P. Buchmann and P. A. Francese, “A 4.6w/mm2 power density 86% efficiency on-chip switched capacitor dc-dc converter in 32 nm SOI CMOS,” IEEE Applied Power Electronics Conference and Exposition (APEC), pp. 692-699, Mar. 2013. [9] M. D. Seeman, “Analytical and Practical Analysis of Switched-Capacitor DC-DC Converters,” EECS Dept., UC Berkeley Univ., Berkeley, CA, USA, 2006. [10] S. B. Yaakov and M. Evzelman, “Generic and Unified Model of Switched Capacitor Converters,” IEEE Energy Conversion Congress and Exposition, pp. 3501-3508, Sep, 2009 [11] I. Oota, N. Hara, and F. Ueno, “A general method for deriving output resistances of serial fixed type switched-capacitor power supplies,” IEEE International Symposium on Circuits and Systems (ISCAS), vol. 3, pp. 503–506, May. 2000. [12] D. Maksimovic and S. Dhar, “Switched-capacitor dc-dc converters for low-power on-chip applications,” IEEE Power Electronics Specialists Conference, vol.1, pp. 54-59, Jun. 1999. [13] H. Banba, H. Shiga, A. Umezawa, T. Miyaba, T. Tanzawa, S. Atsumi, and K. Sakui, “ A CMOS bandgap reference circuit with sub-1-v operation,” IEEE J. Solid-State Circuits, vol. 34, no.5, pp. 670–674, May. 1999. [14] G. Giustolisi, G. Palumbo, M. Criscione, and F. Cutri, “A low-voltage low-power voltage reference based on subthreshold MOSFETs,” Solid-State Circuits, IEEE J. Solid-State Circuits, vol. 38, no.1, pp. 151–154, Jan. 2003. [15] D. E. Damak, S. Bandyopadhyay and A. P. Chandrakasan, “A 93% efficiency reconfigurable switched-capacitor dc-dc converter using on-chip ferroelectric capacitors,” IEEE International Solid-State Circuits Conference, pp. 374-375, Feb. 2013. [16] R. Jain and S. R. Sanders, “A 200ma switched capacitor voltage regulator on 32nm CMOS and regulation schemes to enable dvfs,” European Conference on Power Electronics and Applications, pp. 1-10, Sep. 2011. [17] T. V. Breussegem and M. S. J. Steyaert, “Monolithic capacitive dc-dc converter with single boundary multiphase control and voltage domain stacking in 90 nm CMOS,” IEEE J. Solid-State Circuits, vol. 46, no.7, pp. 1715–1727, Jul. 2011. [18] T. V. Breussegem and M. S. J. Steyaert, “A 82% efficiency 0.5% ripple 16-phase fully integrated capacitive voltage doubler,” in Symp. VLSI Circuits Dig., Jun. 2009, pp. 198-199. [19] V. Muddi, K. D. Shinde and B. K. Shivaprasad, “Design and implementation of 1 Ghz current starved voltage controlled oscillator (VCO) for PLL using 90nm CMOS technology,” International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT), pp. 335-339, Dec. 2015. [20] A. Mishra and G. K. Sharma, “Performance analysis of current starved VCO in 180nm,” IEEE India Conference (INDICON), pp. 1-6, Dec, 2015. [21] J. Zeng, S. Kotikalapoodi and L. Burgyan, “Digital loop for regulating dc/dc converter with segmented switching,” U.S. Patent 6,995,995, Feb. 2006 [22] Y. K. Ramadass, A. A. Fayed, and A. P. Chandrakasan, “A fully-integrated switched-capacitor step-down dc-dc converter with digital capacitance modulation in 45 nm CMOS,” IEEE J. Solid-State Circuits, vol. 45, no.12, pp. 2557–2565, Dec. 2010. [23] H. F. Nurhuda, Y. Yang and W. L. Goh, “A three-topology based, wide input range switched-capacitor dc-dc converter with low-ripple and enhanced load line regulations,” International Symposium on Integrated Circuits (ISIC), pp. 13-16, Sep. 2014. [24] Texas Instruments Corporation datasheet, “LM2772 low-ripple switched capacitor step-down regulator,” [25] Z. Xiao, A. K. Bui and L. Siek, “A hysteretic switched-capacitor dc–dc converter with optimal output ripple and fast transient response,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 11, pp. 2995-3005, Nov. 2017. [26] R. Amariutei, V. Andries, L. Goras, M. Rafaila, A. Buzo and G. Pelz, “On the transient analysis of a dc-dc buck converter under load steps scenarios,” International Symposium on Signals, Circuits and Systems (ISSCS), pp. 1-4, Jul. 2015. [27] T. Ozaki, T. Hirose, H. Asano, N. Kuroki and M. Numa, “A 0.38-μW stand-by power, 50-nA-to-1-mA load current range DC-DC converter with self-biased linear regulator for ultra-low power battery management,” in Asian Solid-State Circuits Conf., pp. 225–228, Nov. 2016. [28] S. R. Sanders, E. Alon, H.-P. Le, M. D. Seeman, M. John, and V. W. Ng, “The road to fully integrated dc–dc conversion via the switched-capacitor approach,” IEEE Transactions on Power Electronics, vol. 28, no. 9, pp. 4146–4155, Sep. 2013. [29] I. Vaisband, M. Saadat and B. Murmann, “A closed-loop reconfigurable switched-capacitor dc-dc converter for sub-mw energy harvesting applications,” IEEE Transactions on Circuits and Systems I-Regular Papers, vol. 62, no. 2, pp. 385-394, Feb. 2015. [30] C. M. Chen, T. W. Tsai, and C. C. Hung, “Fast transient low-dropout voltage regulator with hybrid dynamic biasing technique for SoC application,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 9, pp. 1742-1747, Sep. 2013. [31] J. Wibben and R. Harjani, “A high-efficiency dc–dc converter using 2 nH integrated inductors,” IEEE J. Solid-State Circuits, vol. 43, no.4, pp. 844–854, Apr. 2008. [32] Y. Kojima, T. Hirose, K. Tsubaki, T. Ozaki, H. Asano, N. Kuroki and M. Numa, “A fully on-chip three-terminal switched-capacitor dc-dc converter for low-voltage CMOS LSIs,” Japanese Journal of Applied Physics, vol. 55, no. 4, pp. 1-5, Apr. 2016. [33] H. Saif, Y. Lee, M. Kim, H. Lee, M. B. Khan and Y. Lee, “A wide load and voltage range switched-capacitor dc-dc converter with load-dependent configurability for DVS implementation in miniature sensors,” in Asian Solid-State Circuits Conf., pp. 125–128, Nov. 2017. [34] H. Asano, T. Hirose, Y. Kojima, N. Kuroki and M. Numa, “A fully integrated wide-load-range high-power-conversion-efficiency switched capacitor dc–dc converter with adaptive bias comparator for ultra-low-power power management integrated circuit,” Japanese Journal of Applied Physics, vol. 57, no. 4S, pp. 7-11, Apr. 2018. [35] D. Blaauw, D. Sylvester, P. Dutta, Y. Lee, I. Lee, S. Bang, Y. Kim, G. Kim, P. Pannuto, Y. S. Kuo, D. Yoon, W. Jung, Z. Foo, Y. P. Chen, S. Oh, S. Jeong and M. Choi, “IoT design space challenges: circuits and systems,” in Symp. VLSI Circuits Dig. Tech. Papers, pp. 1-2, Jun. 2014. [36] R. J. M. Vullers, R. v. Schaijk, H. J. Visser, J. Penders and C. V. Hoof, “Energy harvesting for autonomous wireless sensor networks,' Euromicro Conference on Digital System Design (DSD), pp. 301-308, 2016. [37] Cymbet Corporation, “EnerChipTM smart solid-state battery overview,” [38] H. M. Lee, K. Y. Kwon, W. Li and M. Ghovanloo, “A wireless implantable switched-capacitor based optogenetic stimulating system,” in Engineering in Medicine and Biology Society (EMBC), pp. 878-881, Aug. 2014. [39] K. Wei and D. B. Ma, “A 0.2V-to-5V fully-integrated reconfigurable buck/boost switched-capacitor voltage regulator for self-powered wireless sensors,” Design of Circuits and Integrated Systems (DCIS), pp. 1-6, Nov. 2017, [40] M. Wieckowski, G. K. Chen, M. Seok, D. Blaauw and D. Sylvester, “A hybrid dc-dc converter for sub-microwatt sub-1v implantable applications,” in Symp. VLSI Circuits Dig, pp. 166-167, Jun. 2009. [41] B. Razavi, “Design of analog CMOS integrated circuits,” Boston, MA: McGraw-Hill, 2001. [42] Y. Lu, J. Jiang and W. H. Ki, “A multiphase switched-capacitor dc–dc converter ring with fast transient response and small ripple,” IEEE J. Solid-State Circuits, vol. 52, no.2, pp. 579–591, Feb. 2017. [43] K. N. Leung and P. K. T. Mok, “A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation,” IEEE J. Solid-State Circuits, vol. 38, no.10, pp. 1691–1702, Oct. 2003. [44] M. R Halesh, K. R Rasane, and H. Rohini, “Design and implementation of voltage control oscillator (VCO) using 180 nm technology,” CCIS125, pp. 472-478, Jan. 2011. [45] G. Rajahari, Y. A. Varshney, and S. C. Bose, “A novel design methodology for high tuning linearity and wide tuning range ring voltage controlled oscillator,” CCIS 382, pp. 10–18, 2013. [46] A. Majeed K.K and B. J. Kailath, “CMOS current starved voltage controlled oscillator circuit for a fast locking PLL,” IEEE India Conference (INDICON), pp. 1-5, Dec. 2015. [47] S. K. Saw and V. Nath, “An ultra low power and low phase noise current starved CMOS VCO for wireless application,” International Conference on Industrial Instrumentation and Control (ICIC), pp. 1388-1391, Aug. 2015. [48] M. Lanuzza, P. Corsonello and S. Perri, “Low-power level shifter for multi-supply voltage designs,” in IEEE Transactions on Circuits and Systems vol. 59, no. 12, pp. 922-926, Dec. 2012. [49] R. Matsuzuka, T. Hirose, Y. Shizuku, N. Kuroki, and M. Numa, “A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2948–2951, May. 2015. [50] Richtek Technology Corporation Application, “DC/DC converter testing with fast load transient,” [51] Texas Instruments Corporation Application, “High-speed load / line transient jigs and app report for testing fast response pol regulators,” [52] Texas Instruments Corporation Datasheet, “TPS7A470x 36-V, 1-A, 4-µVRMS, RF LDO voltage regulator,” [53] Texas Instruments Corporation Datasheet, “TPS22860 ultra-low leakage load switch,” [54] Chroma Corporation Datasheet, “Programmable dc electronic load model 6310A series,” [55] Keithley Instruments, “Model 2400 series source meter user’s manual,” [56] Keithley Instruments, “Introduction of series 2400 sourcemeter family,” [57] Texas Instruments Corporation Application Report, “Load switches: what are they, why do you need them and how do you choose the right one?” [58] Texas Instruments Corporation Report, “Timing of load switches,” [59] S. Bang, A. Wang, B. Giridhar, D. Blaauw and D. Sylvester, “A fully integrated successive-approximation switched capacitor DC-DC converter with 31mV output voltage resolution,” IEEE International Solid-State Circuits Conference, pp. 370-372, Feb. 2013. [60] X. Zhang, Y. Pu, K. Ishida, Y. Ryu, Y. Okuma, P. H. Chen, K. Watanabe, T. Sakurai, and M. Takamiya, “A 1-V input, 0.2-V to 0.47-V output switched capacitor DC-DC converter with pulse density and width modulation (PDWM) for 57% ripple reduction,” in Asian Solid-State Circuits Conf., pp. 1–4, Nov. 2010. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71833 | - |
dc.description.abstract | 近年來,在低功耗穿戴式裝置晶片中,人們更加關注切換式電容直流電壓轉換器因其不需要電感元件故可大幅降低成本以及晶片面積,本作品為一個以互補式金屬氧化物半導體(CMOS)製作之的除二降壓切換式電容直流電壓轉換器,並包含完整的設計、下線以及量測,此篇論文提出根據負載電流大小能夠自動調整切換頻率,降低切換損耗(Switching loss)並提升負載電流範圍及整體效率,同時利用監測DCDC輸出電流以及負載電流來達成更快速的暫態反應速度,本直流轉換器對於輸入電壓從3.8V到5.4V都能提供1豪安培(mA)以上的抽載電流並維持輸出電壓1.8V。此晶片是以台積電 0.25μm 1P3M High Voltage Mixed Signal CMOS 製程製作。依據實驗結果,本晶片在瞬間抽載時,暫態反應時間約為200ns,負載電流範圍從20微安培(μA)到2.5豪安培(mA),最高效率為72.3%。 | zh_TW |
dc.description.abstract | Recently, people pay high attention to switched capacitor (SC) DC-DC converters which don’t need inductors that can save a lot of cost and die area in the wearable devices. This work encompasses the complete design, fabrication, and measurement of a CMOS based 2:1 step-down switched capacitor DC-DC converter. This thesis proposed a method which can scale the frequency according to the load current to reduce switching losses and increase load current range as well as power efficiency. It can also achieve higher transient response by monitoring the current of switched capacitor DC-DC converter and load current at the same time. The converter provides a fixed output voltage of 1.8V at 1mA from an input voltage ranging from 3.8V to 5.4V. This chip is designed to be implemented in a TSMC 0.25-μm 1P3M High Voltage Mixed Signal CMOS process. According to measurement results, transient recovery time is about 200ns in step response. Output load current range is from 20μA to 2.5mA. The peak power efficiency is 72.3%. | en |
dc.description.provenance | Made available in DSpace on 2021-06-17T06:11:26Z (GMT). No. of bitstreams: 1 ntu-107-R05943134-1.pdf: 4549409 bytes, checksum: 5c47b4af42868e18c92aed872abfa0a7 (MD5) Previous issue date: 2018 | en |
dc.description.tableofcontents | Table Content
摘要 II Abstract IV List of Figures IX List of Tables XII Chapter 1 - Introduction 1 1.1 Motivation 3 1.1 Thesis Overview 5 Chapter 2– Fundamental of Switched Capacitor DC-DC Converters 6 2.1 Introduction 6 2.2 Power Loss Analysis 9 2.2.1 Conduction Loss 10 2.2.2 Gate-Driving Loss 14 2.2.3 Bottom-Plate Loss 15 2.2.4 Control Circuit Power Loss 16 2.3 Voltage Regulation Technique 17 2.3.1 Pulse Frequency Modulation (PFM) 17 2.3.2 Switch Width Modulation 20 2.3.3 Flying Capacitor Modulation 21 2.4 Performance Metrics 22 2.4.1 Line and Load Regulation 23 2.4.2 Line and Load Transient 24 2.4.3 Power Efficiency 25 2.4.4 Power Density 27 Chapter 3– Proposed Switched Capacitor DC-DC Converters 28 3.1 Proposed Architecture 28 3.2 Design Goals 32 3.3 Operational Principle 33 3.3.1 Windows Control Method 34 3.3.2 Current Sensing Control Method 36 3.3.3 Hybrid of Windows and Current Sensing Control 38 Chapter 4– Circuit Implementation 44 4.1 Architecture 44 4.1.1 Core Switched Capacitor Circuit 45 4.1.2 Dual Differential Pair 46 4.1.3 Voltage Control Oscillator 50 4.1.4 Non-Overlap Clock Circuit 54 4.1.5 Level Shifter and Buffer 56 4.2 Simulation Results 58 4.2.1 Steady State Waveforms 58 4.2.2 Transient Waveforms 60 4.2.3 Power Efficiency 62 4.2.4 Summary Table 63 Chapter 5 – Measurement Results 65 5.1 Experimental Setup 65 5.2 Experimental Results 70 5.2.1 Steady State Waveforms 70 5.2.2 Transient Waveforms 74 5.2.3 Power Efficiency 78 5.3 Performance Summary 82 Chapter 6 – Conclusion and Future Work 83 6.1 Conclusion 83 6.2 Future Work 84 Reference 86 | |
dc.language.iso | en | |
dc.title | 一個使用合併電壓與電流感測控制方法之切換式電容直流電壓轉換器 | zh_TW |
dc.title | A Switched Capacitor DC-DC Converter Using Hybrid of Voltage and Current Sensing Control Method | en |
dc.type | Thesis | |
dc.date.schoolyear | 107-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 吳文中(Wen-Jong, Wu),劉宗德(Tsung-Te Liu),陳景然(Chen, Ching-Jan) | |
dc.subject.keyword | 直流電壓轉換器,電流感測, | zh_TW |
dc.subject.keyword | DC-DC converter,current-sensing, | en |
dc.relation.page | 94 | |
dc.identifier.doi | 10.6342/NTU201804247 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2018-10-27 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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