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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 盧信嘉(Hsin-Chia Lu) | |
dc.contributor.author | Tai-Yi Lin | en |
dc.contributor.author | 林岱儀 | zh_TW |
dc.date.accessioned | 2021-06-17T06:02:15Z | - |
dc.date.available | 2019-02-13 | |
dc.date.copyright | 2019-02-13 | |
dc.date.issued | 2019 | |
dc.date.submitted | 2019-01-30 | |
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Kwon, 'A broadband logarithmic power detector in 0.13-um CMOS,' IEEE Microwave and Wireless Components Letters, vol. 23, no. 9, pp. 498-500, Sep. 2013. [14] M. Wei, S. Qayyum and R. Negra, '0.01 GHz to 110 GHz distributed common-gate power detector in standard CMOS 65 nm technology,' 2017 IEEE MTT-S International Microwave Symposium (IMS), Honololu, USA, June. 2017, pp. 634-637. [15] E. Ozeren, Ilker Kalyoncu, Berktug Ustundag, Barbaros Cetindogan, Huseyin Kayahan, Mehmet Kaynak, and Yasar Gurbuz, 'A high dynamic range power detector at X-band,' IEEE Microwave and Wireless Components Letters, vol. 26, no. 9, pp. 708-710, Sep. 2016. [16] B. Moret, E. Kerherve and V. Knopik, 'Non-invasive highly integrated transformer power detector for self-healing PA in 130nm H9SOI-FEM CMOS technology,' 2016 11th European Microwave Integrated Circuits Conference (EuMIC), London, UK, Oct. 2016, pp. 113-116. [17] C. L. Ko, C. H. Li, C. N. Kuo, M. C. Kuo and D. C. Chang, 'A 8-mW 77-GHz band CMOS LNA by using reduced simultaneous noise and impedance matching technique,' 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, May 2015, pp. 2988-2991. [18] E. Cohen, O. Degani and D. Ritter, 'A wideband gain-boosting 8mW LNA with 23dB gain and 4dB NF in 65nm CMOS process for 60 GHz applications,' 2012 IEEE Radio Frequency Integrated Circuits Symposium, Montreal, Canada, July 2012, pp. 207-210. [19] W. T. Li, Jeng-Han Tsai, Hong-Yuan Yang, Wei-Hung Chou, Shyh-Buu Gea, Hsin-Chia Lu and Tian-Wei Huang, 'Parasitic-insensitive linearization methods for 60-GHz 90-nm CMOS LNAs,' IEEE Transactions on Microwave Theory Technniques, vol. 60, no. 8, pp. 2512-2523, Aug. 2012. [20] K. J. Kim, S. H. Lee, S. Park and K. H. Ahn, '60 GHz CMOS gain-boosted LNA with transformer feedbacked neutraliser,' Electronics Letters, vol. 51, no. 18, pp. 1461-1462, Aug. 2015. [21] S. Guo, T. Xi, P. Gui, D. Huang, Y. Fan and M. Morgan, 'A transformer feedback gm-boosting technique for gain improvement and noise reduction in mm-wave cascode LNAs,' IEEE Transactions on Microwave Theory Technniques, vol. 64, no. 7, pp. 2080-2090, July 2016. [22] C. Chou, W. Lai, Y. Hsiao and H. Chuang, '60-GHz CMOS Doppler radar sensor with integrated V-band power detector for clutter monitoring and automatic clutter-cancellation in noncontact vital-signs sensing,' IEEE Transactions on Microwave Theory Technniques, vol. 66, no. 3, pp. 1635 1643, Mar. 2018. [23] R. Levinger, O. Katz, B. Sheinman, R. Carmon, R. Ben-Yishay, N. Mazor, S. Pivnik and Danny Elad, 'An E-band 40dB dynamic range multi-tanh power detector in 0.13μm SiGe technology,' 2014 European Microwave Integrated Circuit Conference, Rome, Italy, Oct. 2014, pp. 170-173. [24] S. Qayyum and R. Negra, '0.16 mW, 7–70 GHz distributed power detector with 75 dB voltage sensitivity in 130 nm standard CMOS technology,' 2017 European Microwave Integrated Circuits Conference (EuMIC), Nuremberg Germany, Oct. 2017, pp. 13-16. [25] K. Kim and Y. Kwon, 'A broadband logarithmic power detector in 0.13-um CMOS,' IEEE Microwave and Wireless Components Letters, vol. 23, no. 9, pp. 498-500, Sept. 2013. [26] J. Wu, Kai-Cheng Hsu, Wei-Ju Lai, Chih-Ho To, Sheng-Wen Chen, Ching-Wen Tang and Ying-Zong Juang, 'A linear-in-dB radio-frequency power detector,' 2011 IEEE MTT-S International Microwave Symposium, Baltimore, USA, June 2011, pp. 1-4. [27] S. Byun, 'Analysis and design of CMOS received signal strength indicator,' IEEE Transactions on Circuits Systems I: Regular Papers, vol. 61, no. 10, pp. 2970-2977, Oct. 2014. [28] N. B. Bambal and S. R. Dixit, 'CMOS limiting amplifier and RSSI (received signal strength indicator),' 2011 Fourth Int. Conf. on Emerging Trends in Engineering & Technology, Port Louis, Mauritius, Jan. 2011, pp. 238-243. [29] Author information unavailable, '60 GHz high gain low noise amplifier using cascode noise reduction technique,' 2013 IEEE International RF and Microwave Conference, Penang, Malaysia, Dec. 2013, pp. 26-29. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71515 | - |
dc.description.abstract | 本論文主要研究毫米波接收訊號強度指示系統之功率偵測相關電路,操作頻率為V頻段及Q頻段,應用於無線通訊系統接收端之即時功率偵測。首先回顧各功率偵測相關電路之文獻,並介紹其架構、原理及應用目的,其中包括一低雜訊放大器及兩種功率偵測電路。
本論文第一個電路提出一V頻段低雜訊放大器,利用源極退化電感及雙重耦合變壓器架構達到低雜訊且高增益的目標,並搭配共源極放大器維持良好線性度,量測最高增益為21.5 dB,最低雜訊指數5.7 dB,於60 GHz下IP1dB為-21.4 dBm,IIP3為-10.6 dBm,直流功耗為16.3 mW。 第二個電路則提出一V頻段功率偵測電路,以單一電路將射頻訊號轉為輸出直流電壓,利用串接多個毫米波放大器及並聯整流器的連接系統,完成電路設計,使用變壓器共閘極放大器搭配共源級放大器加上疊接整流器,配合開關切換提高動態範圍,於55 GHz下功率偵測範圍由-33至5 dBm以上,動態範圍一共為38 dB以上,靈敏度最高為14.5 mV/dB,靜態直流功耗為8.8 mW。 最後提出一Q頻段功率偵測電路,因應功率偵測晶片後端的電路解析,將靈敏度作為首要考量,提供更廣的電壓範圍,以變壓器共閘極放大器搭配共閘極整流器實現,搭配開關切換提高靈敏度,於34 GHz下功率偵測範圍由-20至8.5 dBm,動態範圍一共為28.5 dB,靈敏度最高為46 mV/dB,靜態直流功耗為13.2 mW。 | zh_TW |
dc.description.abstract | This thesis studies power detectors at V-band and Q-band for millimeter wave RSSI system and is proposed to measure power in real time for wireless communication system. First, this thesis reviews literatures related to power detector circuits as well as introduces their structures, theory and applications. This thesis presents a low noise amplifier and two power detectors.
This thesis first proposes a V-band low noise amplifier. It attains low noise and high gain by using source degeneration and double-transformer-coupling structure, along with common source structure to maintain outstanding linearity. The measured maximum gain achieves 21.5 dB with minimum noise figure 5.7 dB, IP1dB -21.4 dBm and IIP3 -10.6 dBm at 60 GHz. The amplifier consumes 16.3 mW dc power. Secondly, in order to convert rf power into dc output voltage with single circuit, this thesis proposes a V-band power detector by utilizing successive millimeter amplifiers and rectifiers in parallel to fulfill its design. Transformer-based common gate amplifier, common source amplifier and cascode rectifier along with switch control are used to increase detector’s dynamic range. The measured detectable range is from -33 dBm to over 5 dBm with dynamic range of at least 38 dB, maximum sensitivity of 14.5 mV/dB at 55 GHz and only 8.8 mW for quasi-dc power consumption. Finally, a Q-band power detector is proposed to meet the demand of sensitivity for next stage like ADC. Taking sensitivity as the first priority, Transformer-based common gate amplifier and common gate rectifier along with switch control are used to offer wider voltage range. The measured detectable range is from -20 dBm to 8.5 dBm, with dynamic range of 28.5 dB, with maximum sensitivity of 46 mV/dB at 34 GHz and only 13.2 mW for quasi-dc power consumption. | en |
dc.description.provenance | Made available in DSpace on 2021-06-17T06:02:15Z (GMT). No. of bitstreams: 1 ntu-108-R05943017-1.pdf: 6253604 bytes, checksum: c9bb9020bbf76bac1de10d1df998d17e (MD5) Previous issue date: 2019 | en |
dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 摘要 ii ABSTRACT iii CONTENTS iv LIST OF FIGURES viii LIST OF TABLES xiv Chapter 1 簡介 1 1.1 研究動機 1 1.2 文獻回顧 4 1.2.1 功率偵測系統 4 1.2.2 低雜訊放大器 5 1.2.3 毫米波功率偵測電路 5 1.3 論文貢獻 7 1.4 各章節介紹 9 Chapter 2 功率偵測器概論 10 2.1 簡介 10 2.2 毫米波功率偵測電路介紹 10 2.2.1 二極體功率偵測電路 10 2.2.2 外差功率偵測電路系統 12 2.3 低雜訊放大器介紹 12 2.3.1 共源極低雜訊放大器 12 2.3.2 疊接低雜訊放大器 14 2.3.3 雙重耦合變壓器電流再利用低雜訊放大器 16 2.4 接收訊號強度指示系統偵測器 18 2.4.1 串聯線性對數偵測器(series linear-limit logarithmic amplifier) 18 2.4.2 並聯加法對數偵測器(parallel summation logarithmic amplifier) 20 2.5 限制放大器 22 2.5.1 折疊二極體負載式放大器 22 2.5.2 毫米波限制放大器 25 2.6 整流器 28 2.6.1 不平衡式源極耦合對(unbalanced source-coupled pairs)整流器 28 2.6.2 共源極回授源極退化對數整流器 29 2.6.3 分佈式共閘極功率偵測器 30 2.6.4 電晶體負載式疊接功率偵測器 31 2.6.5 毫米波共閘極功率偵測器 33 2.7 功率偵測器之參數介紹 36 2.7.1 線性度及線性誤差 36 2.7.2 靈敏度 37 2.7.3 動態範圍 37 2.7.4 最低可偵測功率 37 Chapter 3 功率偵測電路設計 38 3.1 簡介 38 3.2 設計流程 38 3.3 60 GHz雙重耦合變壓器技術之低雜訊放大器 39 3.3.1 規格制訂 39 3.3.2 電路架構 40 3.3.3 設計考量 41 3.3.4 模擬結果 53 3.3.5 電路佈局 57 3.3.6 特性比較 57 3.4 60 GHz高動態範圍可切換對數功率偵測器 60 3.4.1 規格制訂 60 3.4.2 電路架構 61 3.4.3 設計考量 63 3.4.4 模擬結果 70 3.4.5 電路佈局 74 3.4.6 特性比較 74 3.5 39 GHz連續可切換高解析度對數功率偵測器 76 3.5.1 規格制訂 76 3.5.2 電路架構 77 3.5.3 設計考量 78 3.5.4 模擬結果 85 3.5.5 電路佈局 88 3.5.6 特性比較 88 Chapter 4 量測結果 90 4.1 印刷電路板設計 90 4.2 60 GHz低雜訊放大器量測 91 4.2.1 晶片與外焊電容 91 4.2.2 量測環境 93 4.2.3 直流功耗 95 4.2.4 S參數 95 4.2.5 雜訊指數 99 4.2.6 線性度 99 4.2.7 三階輸入截止點 100 4.2.8 電路特性比較 102 4.2.9 電路改良 103 4.3 60 GHz功率偵測電路量測 104 4.3.1 晶片與外焊電容 104 4.3.2 量測環境 106 4.3.3 直流功耗 106 4.3.4 S參數 107 4.3.5 輸出轉換曲線 116 4.3.6 電路特性比較 119 4.4 39 GHz功率偵測電路量測 121 4.4.1 晶片與外焊電容 121 4.4.2 量測環境 123 4.4.3 直流功耗 123 4.4.4 S參數 124 4.4.5 輸出轉換曲線 124 4.4.6 電路特性比較 128 Chapter 5 結論 129 參考文獻 130 | |
dc.language.iso | zh-TW | |
dc.title | 應用於毫米波接收訊號強度指示系統之可切換對數功率偵測器晶片 | zh_TW |
dc.title | Switchable Logarithmic Power Detector Chips for Millimeter Wave Received Signal Strength Indicator System | en |
dc.type | Thesis | |
dc.date.schoolyear | 107-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 王多柏(To-Po Wang),蔡政翰(Jeng-Han Tsai),張鴻埜(Hong-Yeh Chang),林坤佑(Kun-You Lin) | |
dc.subject.keyword | 毫米波,接收訊號強度指示系統,功率偵測電路,低雜訊放大器,雙重耦合變壓器,變壓器共閘極放大器,疊接整流器,共閘極整流器,開關控制, | zh_TW |
dc.subject.keyword | millimeter wave,RSSI system,power detector,low noise amplifier,double-transformer-coupling,transformer-based common gate amplifier,cascode rectifier,common gate rectifier,switch control, | en |
dc.relation.page | 134 | |
dc.identifier.doi | 10.6342/NTU201900305 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2019-01-30 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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