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標題: | 鰭狀砷化銦鎵高載子遷移率電晶體及負電容材料之研究 Investigation of the InGaAs Fin Structure High Electron Mobility Transistors and Negative Capacitance Material |
作者: | Shun-Cheng Yang 楊舜丞 |
指導教授: | 吳肇欣(Chao-Hsin Wu) |
關鍵字: | 砷化銦鎵,鰭式結構,高載子遷移率電晶體,硫化銨表面鈍化,金屬氧化物半導體高載子遷移率電晶體,常關式元件,鐵電材料,負電容,氧化鋯, InGaAs,fin structure,high-electron-mobility-transistor (HEMTs),(NH4)2S passivation,metal-oxide-semiconductor HEMTs (MOSHEMTs),normally-off devices,ferroelectric material,negative capacitance,ZrO2, |
出版年 : | 2018 |
學位: | 碩士 |
摘要: | 以摩爾定律做為開頭,快速回顧半導體過去近50年的發展,瞭解前人於每個技術節點上所遇到的問題以及克服之方法,並簡述未來可能應用之半導體材料及技術,包括三五族電晶體及負電容電晶體。
本論文第一部分簡介高載子遷移率電晶體與其介面特性,利用金氧半電容結構萃取三五族化合物與氧化物之介面缺陷密度,驗證硫化銨溶液確實能降低介面缺陷密度,並比較不同條件之硫化銨表面鈍化,得一最佳化條件,接著將此鈍化條件導入鰭式砷化銦鎵高載子遷移率電晶體之製程中,觀察硫化銨表面鈍化對於電晶體特性之影響。 第二部分以製程技術成功製作出鰭式金屬氧化物半導體砷化銦鎵高載子遷移率電晶體,利用原子層沉積技術於閘極中加入10奈米氧化鋁,其能有效抑制閘極漏流,另外,藉由鰭寬度的微縮我們成功製作出常關式高載子遷移率電晶體,達到低功率消耗的需求,並提出一套理論解釋臨界電壓調變之機制。 第三部分,首先簡述鐵電材料以及負電容特性之應用,接著利用high-k材料氧化鉿搭配鐵電材料氧化鋯的形式製作出負電容元件,驗證電容放大特性,並比較不同厚度的氧化物組合造成電容放大倍率之差異。 Starting with Moore's law, we quickly review the development of semiconductors in the past 50 years, and understand the problems encountered by predecessors at each technology node along with the methods to overcome them. Also, we briefly describe the semiconductor materials and technologies that may be applied in the future, including III-V transistors and negative capacitance transistors. The first part of this thesis introduces the characteristics of high-electron-mobility transistors (HEMTs) and its interface. We fabricated metal-oxide-semiconductor capacitor structure to extract interface traps density between III-V compound semiconductors and oxide layer. It was verified that the ammonium sulfide solution can reduce the interface traps density. We also compared different passivation conditions to obtain an optimized parameter. The optimized passivation condition was introduced into the process of the fin-structured InGaAs HEMTs, and the effect of surface passivation on the transistor was discussed. In the second part, the fin structure metal-oxide-semiconductor HEMTs (Fin-MOSHEMTs) was successfully fabricated by process techniques. The atomic layer deposition technique was used to add 10 nanometer Al2O3 into the gate stack, which can effectively suppress the gate leakage. In addition, by scaling of fin width, we successfully fabricated normally-off HEMTs to meet the demand for low power consumption. Furthermore, we proposed a theory to explain the mechanism of threshold voltage modulation. The third part of this thesis, we briefly introduce the ferroelectric materials and the application of negative capacitance characteristics. The high-k material HfO2 was combined with the ferroelectric material ZrO2 to form a negative capacitance device, which is used to verify the capacitance amplification characteristics. Also, we compared the capacitance amplification results between the different thickness combination of the oxide layer. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71192 |
DOI: | 10.6342/NTU201801945 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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