應用於超音波影像系統之類比接收前端設計

Abstract

隨著可攜式和手持式超音波影像系統在各種應用上的需求增長，設計其類比前端電路變成一個重要的議題，尤其是在有限的功率預算下，設計出最大的動態範圍。此篇論文使用0.13-µm CMOS製程實作一個接收鏈路，其中包含低雜訊放大器(LNA)，壓控衰減器(VCA)，可程式化放大器(PGA)，以及低通濾波器(LPF)。 使用合理的功耗，LNA的雜訊以及線性度表現良好，可得到最佳的動態範圍。此外，在LNA的其他規格諸如輸入阻抗匹配，消除直流偏移，共模回授，以及過載回復時間也都進行考量。在接續的VCA之中，在考量控制增益範圍，誤差，線性度，雜訊，以及不匹配性之後，本論文呈現完整的設計流程包含細部尺寸方法。本論文提出一個全新的電阻線性化技巧應用在VCA中，其中元件的短通道效應也適當的考慮到了。之後的PGA中，設計了兩個增益模式以供選擇，以對應預計的類比數位轉換器的震幅。最後，LPF設計成三階的形式，並且有兩個可控制的頻寬。 根據系統需求以及功耗預算，接收鏈路中重要的設計參數都進行詳細考量。使用3.3伏特的電源電壓，此類比接收前端電路達到1.1 nV/rtHz的輸入雜訊，42 dB的控制範圍，在2 VPP的輸出條件下所有諧波失真皆控制在-50 dBc之內。此電路僅消耗80 mW，可與部分市售產品匹敵，非常適合應用在手持式應用中。

As the increasing demand of ultrasound imaging system in wide variety of hand-held devices in diagnostic medicine, design of analog receiver front-end circuits has become an important issue, especially enlarging the dynamic range with a limited power budget. In this dissertation, a receiver chain including low-noise amplifier (LNA), voltage-controlled attenuator (VCA), programmable-gain amplifier (PGA), and low-pass filter (LPF) is realized in a 0.13-µm CMOS process. With reasonable power consumption, good harmonic distortions and input-referred noise in the LNA are achieved, leading to an optimized dynamic range. Besides, other minor LNA specifications such as input matching, dc-offset cancellation, common-mode feedback, and overload recovery time are also considered. In the following VCA stage, a design procedure including sizing strategy is given, which analyzes controlled range, gain error, linearity, noise, and mismatch in detail. To further reduce the distortion, a simple and effective linearization technique suitable for voltage-controlled MOS resistors is proposed, where the short-channel-device model is utilized for analysis. In the last stages of this receiver chain, the PGA with two gain modes provides appropriate voltage gains for the aimed analog-to-digital convertor, while the 3rd LPF has two controllable frequency corners, which is responsible for anti-aliasing. According to the system requirements and the power budget in a full receiver chain, this dissertation also discusses the parameters’ selection as well as the trade-off. Using 1.2-V and 3.3-V supply voltages, the proposed analog receiver chain achieves 1.1-nV/rtHz input-referred noise, 42-dB gain range, 0.6-dB gain error, 10/20-MHz 3rd frequency corner, and 2-VPP output swing with HDs better than -50 dBc. Consuming power less than 80 mW, the proposed work is proved suitable for the systems in hand-held devices and has comparable performances with commercial products.