場效電板增強型氮化鋁鎵/氮化鎵高電子遷移率電晶體閾值電壓及電流崩潰特性分析

Abstract

III-V族材料氮化鎵近年來在電子元件應用上越來越被重視，其中氮化鋁鎵/氮化鎵高電子遷移率電晶體擁有高能帶及高電子遷移率的材料特性，使其大量應用於高電壓電子元件以及高效率電源轉換系統；異質接合結構所產生的大量二維電子氣，更能提供元件大電流、低阻抗之特性。然而，由於傳統氮化鋁鎵/氮化鎵高電子遷移率電晶體為空乏型操作，在電路設計複雜度上的考量會被空乏型操作的特性限制，以及當元件在高速切換下，材料缺陷所造成的漏電流以及電流坍塌現象使得電晶體無法達到所預期之高效率電能轉換，降低了元件的效能。本研究致力於提升化鋁鎵/氮化鎵高電子遷移率電晶體的閾值電壓，也探討場效電板結構在不同操作電壓下的電流坍塌現象的表現。 在本論文中，根據先前實驗經驗利用p型氮化鎵覆蓋層達到增強型操作元件，另外再發展場效電板結果應用在元件上並探討其電流特性。經由實驗結果發現在增強型氮化鋁鎵/氮化鎵高電子遷移率電晶體加上場效電板結構，能夠大幅提高增強型元件之閾值電壓。我們根據場效電板增強型氮化鋁鎵/氮化鎵高電子遷移率電晶體之電流行為提出模型，在不同的閘極電壓下，場效電板下以及閘極下二維電子氣的感受電壓不同，造成兩區段的二維電子氣通道不同時完全導通。有場效電板結構的元件，藉由線性外推法定義出的閾值電壓可以高達5.9V，遠高於市面上以其他方式達到增強型操作的氮化鋁鎵/氮化鎵高電子遷移率電晶體約1伏特的閾值電壓。 本論文也同時探討電流坍塌現象對於場效電板p型氮化鋁鎵/氮化鎵高電子遷移率電晶體之影響。過去多文獻指出場效電板對於降低電流坍塌效應是有助益的，但由於場效電板結構會造成額外的電容產生，兩者間相互作用下的元件表現結果卻少有文章討論。在此研究中，我們架設以及量測場效電板p型氮化鋁鎵/氮化鎵高電子遷移率電晶體動態電特性，以及量測場效電板結構對於閘極和汲極間電容影響、電流坍塌回復的時間常數。得到在低操作電壓下，場效電板對於降低電流坍塌的幫助有限，而場效電板額外造成的電容使得電流回復的時間變長；而在高操作電壓下，由於場效電板能夠有效的降低閘極附近的峰值電場，進一步降低被捕獲在缺陷的電子數，相較於沒有場效電板的元件，電流坍塌的現象有明顯的改善，而場效電板造成的額外電容影響在此操作電壓下就微不足道。本研究使用的元件中，得出41伏特時為分水嶺，作為在應用時設計場效電板結構參考的標準。

Gallium nitride high electron mobility transistors (GaN HEMTs) have gained more focus in recent years. Due to the outstanding material properties including wide-band-gap and high electron mobility, GaN HEMTs are widely applied to high voltage electronics and high-efficiency power conversion systems. The two dimensional electron gas (2DEG) formed in heterojunction ensures the large operating output current and low on-resistance of the device. However, the inherent normally-on behavior excludes GaN HEMTs from most power electronic applications for reduced circuit complexity and fail-safe operation and current collapse phenomenon concerning the material defects reduce the power conversion efficiency of the device in high speed switching. With the purpose to increase the threshold voltage of the enhancement mode GaN HEMTs (high-electron mobility transistors), we fabricated devices with gate field plates on the p-GaN/AlGaN/GaN/AlGaN double heterostructure. We observed an existence of a subthreshold region from the current –voltage transfer curves. The threshold voltage of the device extracted based on linear extrapolation method is much higher (up to 5.90V) than that of a typical device without a gate field plate. We investigated electrical properties and proposed a model based on carrier distributions with the influence of gate electric field at different regions. Furthermore, we characterized current collapse phenomenon of p-GaN/AlGaN/GaN/AlGaN double heterostructure HEMTs with gate field plates. Our study shows gate field-plate induces additional capacitance that deteriorates current collapse phenomenon at lower off-state drain bias. On the other hand, suppression of current collapse with the existence of gate field plate is observed when the device is switched by a higher off-state drain voltage (>41V in our case for field plate of 3 µm). The results suggest the adoption of gate field plate depends on the application. For low drain voltage (<41V) application, one has to shrink the gate field plate length to reduce gate capacitance and alleviate the corresponding drawback of higher channel resistance. For power electronics operated far above 41V, field plate is advantageous to spread out vertical electric field.