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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/68359完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 洪士灝 | |
| dc.contributor.author | En-Jung Chang | en |
| dc.contributor.author | 張恩榮 | zh_TW |
| dc.date.accessioned | 2021-06-17T02:18:40Z | - |
| dc.date.available | 2022-08-31 | |
| dc.date.copyright | 2017-08-31 | |
| dc.date.issued | 2017 | |
| dc.date.submitted | 2017-08-21 | |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/68359 | - |
| dc.description.abstract | 目前的大部分處理器都提供了向量指令， 這些指令可以藉由同時使用多個計算單元，提供比標量指令更高的性能。 雖然目前存在的編譯器都支援這些向量指令，但是編譯器可能因為一些限制使其將適合向量化的程式編譯成純量程式碼，例如非單位步長，條件分支和指針。
我們提出一個新的指標: 向量友善度(Vector Friendliness)，向量友善度代表一個程式相位適合向量化的機率。再者，我們還定義了一個新名詞 Vector Intensive Phase (VIP)，只要相位中向量行數大於 50%，我們就認定這個相位為 VIP。為了找到 VIP，我們利用一種機器學習模型 Recurrent Neural Network (RNN) 學習怎麼樣的 memory trace 是適合向量化的，其中，模型的輸入是 memory trace，模型的輸出為向量友善度。我們收集了許多程式，並且利用程式相位為主的模擬器去抽取 memory trace，接著使用一套自動標籤系統將所有收集到的程式相位標籤為 VIP 或者 non-VIP，除此之外，我們還提出一套合成資料生成器，用來合成更多的 memory trace，訓練完後，我們的模型準確度達90\%，我們發現利用 memory trace 去判斷 VIP 是可行的。在預測向量友善度之後，我們可以進一步去預測一個程式相位是否適合放在 Xeon Phi 上執行，我們使用多種指令比例作為 Support Vector Machine (SVM) 的輸入來預測 Xeon Phi friendliness，Xeon Phi friendliness代表一個程式相位適不適合放在 Xeon Phi 上執行，最終模型的準確度為 85%。 | zh_TW |
| dc.description.abstract | T Many of the today's processors provide vector instructions that can utilize multiple computing units in parallel to deliver higher performance than scalar instructions. While vectorizing compiler techniques exist to take advantage of vector instructions, it is often that the compiler fails to vectorize code sequences that could be manually converted into vector codes, due to restrictions such as non-units stride, conditional branches, and pointer.
We propose Vector Friendliness to quantize the probability that the program phase is suitable for vectorization. We also defined the Vector Intensive Phase (VIP). VIP represents a code sequence that it is suitable for vectorize. In order to find the VIP, we leverage Recurrent Neural Network (RNN) to recognize which program phase can be vectorized in terms of memory traces, help programmers identify the program phases that could have been vectorized manually, but not done by the compiler. Moreover, we collect programs from benchmarks and apply a program phase based profiler to extract the memory trace. Then use the proposed labeling system automatically classifies these program phases. After training, the accuracy of our model comes to 90\%. We found that using memory traces to classify VIP is feasible. Beyond vector friendliness, we use Support Vector Machine (SVM) to analyze the ration of various types of instructions and then report Xeon Phi friendliness. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-17T02:18:40Z (GMT). No. of bitstreams: 1 ntu-106-R04944030-1.pdf: 4805129 bytes, checksum: cd1bff01506f8077d59fd4023c2b9961 (MD5) Previous issue date: 2017 | en |
| dc.description.tableofcontents | 誌謝 i
摘要 ii Abstract iii Chapter 1 Introduction 1 Chapter 2 Background and Related Work 5 2.1 AnEvaluationofVectorizingCompiler .................. 5 2.2 QEMUandVPMU ............................. 7 2.3 ProgramPhaseDetection.......................... 7 2.4 Predicting GPU Performance with Machine Learning . . . . . . . . . . . 8 2.5 RecurrentNeuralNetwork ......................... 9 2.5.1 TraditionalRecurrentNeuralNetwork . . . . . . . . . . . . . . . 9 2.5.2 LongShort-TermMemory ..................... 9 2.6 Tensorflow ................................. 10 2.7 XeonPhi .................................. 11 Chapter 3 Methodology 12 3.1 FrameworkOverview............................ 13 3.2 MemoryEventsCollector.......................... 13 3.3 ModelDesignofRecurrentNeuralNetwork . . . . . . . . . . . . . . . . 14 3.3.1 MemoryTrace ........................... 14 3.3.2 RNNBasedModelforVectorFriendliness . . . . . . . . . . . . 15 3.4 Dataset ................................... 16 3.4.1 TrainingDataandTestingData .................. 16 3.4.2 GenerateSyntheticData ...................... 16 3.5 AutomaticLabeling............................. 17 3.5.1 Labeling Phases with Compiler Optimization Reports . . . . . . . 17 Chapter 4 Evaluation 20 4.1 ExperimentalSetup............................. 20 4.2 ParametersofRNNBasedModel...................... 21 4.3 AccuracyEvaluation ............................ 21 4.3.1 CompilerModel .......................... 22 4.3.2 StrideModel ............................ 23 4.4 XeonPhiFriendliness............................ 26 4.5 CaseStudies................................. 27 4.5.1 Case Study: Array of Structure (AoS) and Structure of Array (SoA) 27 4.5.2 CaseStudy:LoopSplitting..................... 29 4.5.3 CaseStudy:PrefixSum ...................... 29 Chapter 5 Application Case Study 31 Chapter 6 Conclusion and Future Work 35 Bibliography 36 | |
| dc.language.iso | en | |
| dc.title | 基於程式相態特性分析與機器學習的矢量友好性預測 | zh_TW |
| dc.title | Estimation of Vector Friendliness Based on Program Phase
Profiles and Machine Learning | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 105-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 廖世偉,涂嘉恆 | |
| dc.subject.keyword | 向量指令集,向量友善度,機器學習,裝置友善度,程式相 態,程式分析, | zh_TW |
| dc.subject.keyword | Vector instruction set,Vector friendliness,Machine learning,Xeon Phi friendliness,Program phases,Profiling tool, | en |
| dc.relation.page | 40 | |
| dc.identifier.doi | 10.6342/NTU201704035 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2017-08-22 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 資訊網路與多媒體研究所 | zh_TW |
| 顯示於系所單位： | 資訊網路與多媒體研究所 | |
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