利用脈衝省略模式達成交流轉直流功因校正整流器之穩態分析

Abstract

功因校正是電源供應器輸入端為電力線時，必需要面對的課題。長久以來在各種應用當中，最廣泛被使用的電路是一昇壓型轉換器串聯一返馳式轉換器。此電路通常使用兩個獨立的迴授控制，其中一個迴授處理昇壓型轉換器輸入端的功因校正並同時控制大型電容電壓，另一個迴授控制返馳式轉換器以提供穩定的輸出電壓。這種方法需要兩級的電力級電路，與兩個獨立的迴授控制器。 為了簡化電路與降低成本，僅需一級電力級電路及單一迴授控制器的單級功因校正轉換器，是近來研究的方向。然而此種方法的缺點是較高的開關切換損失，以及需要額外的電力級零件以壓制過高的大型電容電壓。 近來有趨勢是利用犧牲功率因素來達到降低電路成本，只要輸入電流的諧波仍然符合規範。一種稱為脈衝省略功因校正整流器被提出，來達成上述的目標。此種轉換器仍有兩級的電力級電路，但只需一個迴授控制器即可控制兩個開關。前級的昇壓型轉換器操作於不連續導通模式，達成可接受的功因校正，而後級為返馳式轉換器。返馳式轉換器的開關訊號是利用傳統脈衝寬度調變的方式產生，但昇壓型轉換器的開關訊號是利用脈衝省略模式產生。這種方式可以保持輸入電流諧波在可接受範圍，並控制大型電容電壓在合理的值。 此電路仍未被研究與生產，而本論文的目標即是研究此電路。數學推導分析了大型電容電壓與其它元件、操作模式的複雜關係，以及脈衝省略的操作策略，並用模擬電路驗證了理論分析。結論指出這種電路雖然有得到某些好處，但也有嚴重的缺點。

Power factor correction (PFC) is a must nowadays for many power supply applications in which the power is derived directly from a power line. For many years, a boost converter cascaded by a flyback converter has been a popular circuit configuration for many applications. Two feedback control loops are usually used; one controlling the input power factor and providing rough bulk capacitor voltage regulation, and the other one controlling the flyback converter to provide a tightly regulated output voltage. This approach uses two power stages and two separate controller integrated circuits (ICs). There has been a trend to simplify the circuit configuration and to reduce the overall cost by developing the so-called single-stage PFC in which one power stage and one controller IC are used. However, there are disadvantages associated with such approach. One of those is higher power switch losses. And the other is that additional power stage component is usually needed to prevent the bulk voltage from going too high. Recently, there has been a trend to cut down the overall cost even at the expense of power factor, or more precisely, the input harmonic current, as long as it meet minimum requirement. There was a strategy reported, the so-called pulse-skipping PFC converter to achieve the goal mentioned above. In this strategy, there still are two power stages used but there is only one feedback control IC to provide gate drive signals to the main switches of the two stages. The front-stage boost converter is always operated in discontinuous conduction mode to achieve acceptable power factor. The second dc/dc stage is the flyback converter. The gate drive signal to the flyback converter is the same as the conventional strategy, but the gate drive signal to the boost converter is used with skipping the pulses. This strategy may keep the input harmonic current in acceptable range and still manage the bulk voltage to stay within reasonable range. The focus of the present thesis is to investigate such a strategy which was patented but not fully studied and certainly not yet implemented. Mathematical analysis are conducted to reveal the complicated relationships, particularly the intermediate bulk voltage dependency on circuit component values, working conditions, and the pulse-skipping strategy. Simulations run are performed to verify the mathematical results. The conclusions from this effort indicate that there is an advantage but also serious drawbacks of such an approach.