請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/6541完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 張璞曾(Fok-Ching Chong) | |
| dc.contributor.author | Hung-Jui Hsu | en |
| dc.contributor.author | 許宏瑞 | zh_TW |
| dc.date.accessioned | 2021-05-17T09:14:32Z | - |
| dc.date.available | 2014-08-18 | |
| dc.date.available | 2021-05-17T09:14:32Z | - |
| dc.date.copyright | 2012-08-18 | |
| dc.date.issued | 2012 | |
| dc.date.submitted | 2012-08-15 | |
| dc.identifier.citation | [1] W. Jatmiko, P. Mursanto, A. Febrian, M. Fajar, W.T. Anggoro, R.S. Rambe, M.1. Tawakal, Fauzi, F. Jovan, and M. Eka S., “Arrhythmia Classification from Wavelet Feature on FGPA,” 2011 International Symposium on Micro-NanoMechatronics and Human Science (MHS), Nagoya, pp.349-354, Nov. 2011.
[2] Chia-Hung Lin and Guo-Wei Lin, “FPGA implementation of Fractal Patterns Classifier for Multiple Cardiac Arrhythmias Detection,” Journal of Biomedical Science and Engineering, vol.5, pp.120-132, Mar. 2012. [3] M. Cvikl and A. Zemva, “FPGA-oriented HW/SW Implementation of ECG Beat Detection and Classification Algorithm,” Digital Signal Process., vol.20, no.1, pp.238–248, Jan. 2010. [4] Nambakhsh, M.S., Tavakoli, V. and Sahba, N., “FPGA-core Defibrillator Using Wavelet-Fuzzy ECG Arrhythmia Classification,” In Proceeding of 30th Annual International IEEE EMBS Conference, Vancouver, pp.2673-2676, Aug. 2008. [5] Rigler, S., Bishop, W., and Kennings, A., “FPGA-based Lossless Data Compression Using Huffman and LZ77 Algorithms,” In Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, pp. 1235–1238, 2007. [6] M. Meira, J. Lima, and L. Batista, “An FPGA Impementation of A Lossless Electrocardiogram Compressor Based on Prediction and Golomb-Rice Coding,” In Proceedings of the V Workshop de Informatica Medica, 2005. [7] Dora Maria Ballesteros Larrotta, Diana Marcela Moreno Enciso, and Andres Eduardo Gaona Barrera, “Compression of Biomedical Signals on FPGA by DWT and Run-Length,” In Proceeding of IEEE ANDESCON 2010, Bogota, Colombia, pp. 1-5, 2010. [8] Y. Yongming, L. Jungang and W. Jianmin, “LADAT Arithmetic Improved and Hardware Implemented for FPGA-based ECG Data Compression,” 2nd IEEE Conference on Industrial Electronics and Applications, pp.2230-2234, 2007. [9] Yongming Yang, Xiaobo Huang, and Xinghuo Yu, “Real-Time ECG Monitoring System Based on FPGA,” 33rd Annual Conference of the IEEE Industrial Electronics Society 2007. [10] M. Fons, F. Fons, and E. Canto, “Fingerprint Image Processing Acceleration Through Run-Time Reconfigurable Hardware,” IEEE Transaction on Circuits and Systems—II: Express Briefs, vol. 57, no. 12, pp.991-995, Dec. 2010. [11] M. Fons, and F. Fons, “Run-time Reconfigurable Hardware Technology Brings Key Advantages in the Design of Automatic Personal Recognition Systems,” Xcell Journal ,pp.24-31, 2010. [12] Xilinx, Inc., MicroBlaze Processor Reference Guide, Ver.11.1, Mar. 1, 2011. [13] Xilinx, Inc., System Generator for DSP Getting Started Guide, Ver.10.1, Mar., 2008. [14] Xilinx, Inc., System Generator for DSP Reference Guide, Ver.12.3, Sep. 21, 2010. [15] Xilinx, Inc., System Generator for DSP User Guide, Ver.12.3, Sep. 21, 2010. [16] Xilinx, Inc., ISE Simulator(ISim) In-Depth Tutorial, Ver.12.3, Sep. 21, 2010. [17] Xilinx, Inc., EDK Concepts, Tools, and Techniques -- A Hands-On Guide to Effective Embedded System Design, Sep. 21, 2010. [18] Xilinx, Inc., PlanAhead User Guide, Ver12.3, Jul. 6, 2011. [19] Xilinx, Inc., LogiCORE IP XPS HWICAP (v5.00a), Jul. 23, 2010. [20] Xilinx, Inc., Partial Reconfiguration User Guide, Ver.12.3, May 3, 2010. [21] Xilinx, Inc., Partial Reconfiguration of Xilinx FPGAs Using ISE Design Suite, Ver.1.1, Jul. 6, 2011. [22] H.H.So and K.L.Chan, 'Development of QRS Detection Method for Real Time Ambulatory Cardiac Monitor,” Proceedings of the 19th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, Chicago, USA, pp. 289-292,1997. [23] K. F. Tan, K. L. Chan, and K. Choi, “Detection of the QRS-complex, P Wave and T Wave in Electrocardiogram,” Advances in Medical Signal and Information Processing, pp.41-47, 2000. [24] J. Pan and W.J. Tompkins, “A Real-Time QRS Detection Algorithm,” IEEE Transaction Biomedical Engineering, vol. 32, pp. 230-236, 1985. [25] M. G. Tsipouras, D. I. Fotiadis, and D. Sideris, “Arrhythmia Classification Using the RR-interval Duration Signal,” in Proceedings Computers in Cardiology, 2002, vol. 29, pp. 485–488. [26] M. G. Tsipouras, D. I. Fotiadis, and D. Sideris, “An Arrhythmia Classification System based on the RR-interval Signal,” Artificial Intelligence Medicine, vol. 33, pp. 237–250, 2005. [27] Hannu Olkkonen, “Discrete Wavelet Transform–Biomedical Applications,” 1st ed., Croatia : InTech, Aug. 2011, pp.17-32. [28] W. Sweldens, “The Lifting Scheme: A Custom-Design Construction of Biorthogonal Wavelets,” Applied and Computational Hardware Analysis, vol.3 , no. 3, pp. 186-200, 1996. [29] R. Calderbank, I. Daubechies, W. Sweldens, and B.-L. Yeo, “Wavelet Transforms that Map Integers to Integers,” Applied and Computational Hardware Analysis, vol. 5, no. 3, pp. 332-369, Jul. 1998. [30] SW Smith. “Digital Signal Processing: A Practical Guide ofr Engineers and Scientistics,” Elsevier Science, Newnes, 2003. [31] Xilinx, Inc., ML605 Hardware User Guide, Ver.1.7, Jun. 19, 2012. [32] MIT-BIH arrhythmia database CD-ROM. 3rd ed. Harvard-MIT Division of Health Sciences and Technology, 1997. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/6541 | - |
| dc.description.abstract | 心電圖(Electrocardiography)是診斷心律不整最重要的生理訊號，目前相關研究所提出的心電圖之系統架構，大致可以分為兩類，分別是診斷型和記錄型；診斷型系統是本身具有判斷病徵的功能(例如心律不整)，當診斷到疑似異常的心電圖訊號時，就發出警示，並將心電圖資料傳送給醫護人員；記錄型系統則是直接儲存或是傳送原始的心電圖訊號，但是這將有資料量過大的問題，所以系統通常會將資料做壓縮的處理。
本研究提出一個整合診斷與壓縮模組之架構，其同時具備上述系統之優點；我們將此架構實現在FPGA平台上，由於FPGA能夠高效率的處理複雜的運算，並維持良好的處理速度，因此系統能夠做到即時(Real-Time)的訊號處理；另外，我們更利用FPGA的部份可重置(Partial Reconfiguration)技術，進一步降低系統的使用資源、成本、以及功率消耗；FPGA的系統架構亦適合被轉換成ASIC，將更適合作為可攜式的生理監控裝置。 | zh_TW |
| dc.description.abstract | Electrocardiography is an important method used in physiological signals to detect arrhythmia. At present, related researches in the architecture of Electrocardiography system can be classed as two kinds: diagnosis support system and recording system. Diagnosis support system has the ability to detect suspected arrhythmia. When the system detects abnormal signals, it will send alarm or begin to transmit the detected signals to the hospital. However, the recording system will directly store the original signal into the memory or sent all the data to hospital. But the amount of data may be too huge. Generally, the system will transmit the data after compression.
Our research proposes an integrated diagnosis support system with compression. It has the advantages of the previous two types of systems. We implement the architecture base on FPGA. Therefore, the system can achieve real-time work since the FPGA has high performance computing ability and speed. Furthermore, partial reconfiguration technology of FPGA is used to save internal logic, power consumption, and cost. When the system is converted to application-specific integrated circuit (ASIC), it will be appropriate to used as a portable device. | en |
| dc.description.provenance | Made available in DSpace on 2021-05-17T09:14:32Z (GMT). No. of bitstreams: 1 ntu-101-R99945033-1.pdf: 4322325 bytes, checksum: 7ba9e6fc458119bf7126dcf941b43186 (MD5) Previous issue date: 2012 | en |
| dc.description.tableofcontents | 口試委員會審定書 i
摘要 ii ABSTRACT iii 總目錄 iv 圖目錄 vii 表目錄 x 第一章 緒論 1 1.1 心電圖簡介 1 1.1.1 心電圖原理與功能 1 1.1.2 心律不整 2 1.2 研究動機 4 1.3 研究目的 6 1.4 論文架構 7 第二章 背景知識 8 2.1 FPGA基本概念 8 2.1.1 FPGA簡介 8 2.1.2 SOPC系統 11 2.1.3 MicroBlaze處理器 11 2.2 Xilinx Virtex-6 ML605 13 2.3 設計軟體與流程 14 2.3.1 System Generator 14 2.3.2 Xilinx ISE 17 2.3.3 EDK 18 2.3.4 PlanAhead 21 2.4 配置介面 22 2.4.1 JTAG與SelectMAP 22 2.4.2 ICAP 22 2.5 部份可重置技術 24 2.5.1 基本概念 24 2.5.2 相關研究 25 第三章 系統設計 28 3.1 系統概述 28 3.2 監測模組 31 3.2.1 心電圖R波偵測 31 3.2.2 心律不整判斷 35 3.2.3 模組設計 40 3.2.3.1 斜率與初始閥值計算 41 3.2.3.2 R波偵測與閥值更新 43 3.2.3.3 心律不整判斷 46 3.3 壓縮模組 50 3.3.1 離散小波轉換 51 3.3.2 Run-Length編碼 55 3.3.3 模組設計 56 3.3.3.1 資料擷取與位移 57 3.3.3.2 5/3整數對整數小波轉換 59 3.3.3.3 閥值篩選 62 3.3.3.4 Run-Length編碼 64 3.4 MicroBlaze處理器系統模組 66 第四章 實驗結果與討論 69 4.1 實驗資料與平台 69 4.1.1 MIT-BIH心律不整資料庫 69 4.2 實驗結果 71 4.2.1 R波偵測 71 4.2.2 心律不整判斷 75 4.2.3 心電圖訊號壓縮 78 4.2.4 系統效能量測 83 第五章 結論 88 參考文獻 90 | |
| dc.language.iso | zh-TW | |
| dc.title | 基於FPGA的部份可重置技術之心律不整診斷支援系統 | zh_TW |
| dc.title | An Arrhythmia Diagnosis Support System Base on Partial Reconfiguration of FPGA | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 100-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 林伯星,詹曉龍,余松年 | |
| dc.subject.keyword | FPGA,部份可重置,心電圖,心律不整,壓縮, | zh_TW |
| dc.subject.keyword | Field Programmable Gate Array,FPGA,Partial Reconfiguration,Electrocardiography,ECG,Arrhythmia,Compression, | en |
| dc.relation.page | 94 | |
| dc.rights.note | 同意授權(全球公開) | |
| dc.date.accepted | 2012-08-15 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 生醫電子與資訊學研究所 | zh_TW |
| 顯示於系所單位： | 生醫電子與資訊學研究所 | |
文件中的檔案：
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-101-1.pdf | 4.22 MB | Adobe PDF | 檢視/開啟 |
系統中的文件，除了特別指名其著作權條款之外，均受到著作權保護，並且保留所有的權利。