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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/65056
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dc.contributor.advisor呂學士
dc.contributor.authorKen Huangen
dc.contributor.author黃肯zh_TW
dc.date.accessioned2021-06-16T23:19:29Z-
dc.date.available2022-08-01
dc.date.copyright2012-08-15
dc.date.issued2012
dc.date.submitted2012-08-01
dc.identifier.citation[1] Yuce, M.R.; Ng, S.W.P.; Myo, N.L.; Lee, C.K.; Khan, J.Y.; Wentai Liu; , 'A MICS Band Wireless Body Sensor Network,' Wireless Communications and Networking Conference, 2007.WCNC 2007. IEEE , vol., no., pp.2473-2478, 11-15 March 2007
[2] Yuce, M.R.; Peng Choong Ng; Lee, C.K.; Khan, J.Y.; Wentai Liu; , 'A Wireless Medical Monitoring Over a Heterogeneous Sensor Network,' Engineering in Medicine and Biology Society, 2007. EMBS 2007. 29th Annual International Conference of the IEEE , vol., no., pp.5894-5898, 22-26 Aug. 2007
[3] B. Razavi, RF Microelectronics, Upper Saddle River, NJ: Prentice Hall, 1998.
[4] D. Banerjee, PLL performance, simulation, and design, National Semiconductor, available on: http://webench.national.com/appinfo/wireless/files/deansbook4.pdf
[5] B. Razavi, Design of Analog CMOS Integrated Circuits, New-York: McGraw-Hill, 2001.
[6] Keliu Sue, Edgar Sanchez-Sinencio, CMOS PLL Synthesizers: Analysis and Design, 2005.
[7] Y. C. Yang, The design and application of CMOS fully-integrated PLL-based fractional-N frequency synthesizers, Ph.D Dissertation, Grad. Inst. of Electronics Engineering, National Taiwan University, Jul. 2007.
[8] Keliu Shu; Sanchez-Sinencio, E.; Silva-Martinez, J.; Embabi, S.H.K.; , 'A 2.4-GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier,' Solid-State Circuits, IEEE Journal of , vol.38, no.6, pp. 866- 874, June 2003
[9] Y. Koo, H. Huh, Y. Cho, J. Lee, J. Park, K. Lee, D. Jeong, and W. Kim, “A Fully Integrated CMOS Frequency Synthesizer With Charge-Averaging Charge Pump and Dual-Path Loop Filter for PCS- and Cellular-CDMA Wireless Systems,” IEEE J. Solid-State Circuits, pp. 536-542, May 2002.

[10] Kral, A.; Behbahani, F.; Abidi, A.A.; , 'RF-CMOS oscillators with switched tuning,' Custom Integrated Circuits Conference, 1998. Proceedings of the IEEE 1998 , vol., no., pp.555-558, 11-14 May 1998
[11] Li, Z.; O, K.K.; , 'A 1-V low phase noise multi-band CMOS voltage controlled oscillator with switched inductors and capacitors,' Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE , vol., no., pp. 467- 470, 6-8 June 2004
[12] Craninckx, J.; Steyaert, M.S.J.; , 'A fully integrated CMOS DCS-1800 frequency synthesizer,' Solid-State Circuits, IEEE Journal of , vol.33, no.12, pp.2054-2065, Dec 1998
[13] Jie Pan; Haigang Yang; Li-wu Yang; , 'A high-speed low-power pulse-swallow divider with robustness consideration,' Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on , vol., no., pp.2168-2171, 20-23 Oct. 2008
[14] Vaucher, C.; Kasperkovitz, D.; , 'A wide-band tuning system for fully integrated satellite receivers ,' Solid-State Circuits, IEEE Journal of , vol.33, no.7, pp.987-997, Jul 1998
[15] Gardner, F.; , 'Charge-Pump Phase-Lock Loops,' Communications, IEEE Transactions on , vol.28, no.11, pp. 1849- 1858, Nov 1980
[16] S. H. Lin, CMOS PLL-Based Frequency Synthesizers for Broadband Wireless Communication System, Master Thesis, NTU, July 2008
[17] Hajimiri, A.; Lee, T.H.; , 'Design issues in CMOS differential LC oscillators,' Solid-State Circuits, IEEE Journal of , vol.34, no.5, pp.717-724, May 1999
[18] F. J. Liao, Chipset for Wireless Biotelemetry Circuits, Master Thesis, NTU, Jan. 2005
[19] Levantino, S.; Samori, C.; Bonfanti, A.; Gierkink, S.L.J.; Lacaita, A.L.; Boccuzzi, V.; , 'Frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion,' Solid-State Circuits, IEEE Journal of , vol.37, no.8, pp. 1003- 1011, Aug 2002
[20] Vaucher, C.S.; Ferencic, I.; Locher, M.; Sedvallson, S.; Voegeli, U.; Wang, Z.; , 'A family of low-power truly modular programmable dividers in standard 0.35-/spl mu/m CMOS technology,' Solid-State Circuits, IEEE Journal of , vol.35, no.7, pp.1039-1045, July 2000
[21] Y. H. Wang, ―A Frequency Synthesizer and Low-noise Amplifiers for Wireless Communication, Master Thesis, NTU, June 2009
[22] S. Shin, K. Lee, and S. M. Kang, ―4.2mW CMOS frequency synthesizer for 2.4GHz ZigBee application with fast settling time performance, IEEE Int. Microwave Theory and Tech. Symp., pp. 411-414, 2006.
[23] Riley, T.A.D.; Copeland, M.A.; Kwasniewski, T.A.; , 'Delta-sigma modulation in fractional-N frequency synthesis ,' Solid-State Circuits, IEEE Journal of , vol.28, no.5, pp.553-559, May 1993
[24] FCC Rules and Regulations, “MICS Band Plan,” Part 95, Jan. 2003
[25] Savci, H.S.; Sula, A.; Wang, Z.; Dogan, N.S.; Arvas, E.; , 'MICS transceivers: regulatory standards and applications [medical implant communications service],' SoutheastCon, 2005. Proceedings. IEEE , vol., no., pp. 179- 182, 8-10 April 2005
[26] Jahan, M.S.; Holleman, J.H.; , 'An ultra-low-power 400 MHz VCO for MICS band application,' Electrical and Computer Engineering (ICECE), 2010 International Conference on , vol., no., pp.318-321, 18-20 Dec. 2010
[27] Zhao, X.; Chebli, R.; Sawan, M.; , 'A wide tuning range voltage-controlled ring oscillator dedicated to ultrasound transmitter,' Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on , vol., no., pp. 313- 316, 6-8 Dec. 2004
[28] Yao-Hong Liu; Tsung-Hsien Lin; , 'A Wideband PLL-Based G/FSK Transmitter in 0.18 m CMOS,' Solid-State Circuits, IEEE Journal of , vol.44, no.9, pp.2452-2462, Sept. 2009
[29] Yao-Hong Liu; Cheng-Lung Li; Tsung-Hsien Lin; , 'A 200-pJ/b MUX-Based RF Transmitter for Implantable Multichannel Neural Recording,' Microwave Theory and Techniques, IEEE Transactions on , vol.57, no.10, pp.2533-2541, Oct. 2009
[30] Cook, B.W.; Berny, A.D.; Molnar, A.; Lanzisera, S.; Pister, K.S.J.; , 'An Ultra-Low Power 2.4GHz RF Transceiver for Wireless Sensor Networks in 0.13/spl mu/m CMOS with 400mV Supply and an Integrated Passive RX Front-End,' Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International , vol., no., pp.1460-1469, 6-9 Feb. 2006
[31] Cojocaru, C.; Pamir, T.; Balteanu, F.; Namdar, A.; Payer, D.; Gheorghe, I.; Lipan, T.; Sheikh, K.; Pingot, J.; Paananen, H.; Littow, M.; Cloutier, M.; MacRobbie, E.; , 'A 43mW Bluetooth transceiver with -91dBm sensitivity,' Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International , vol., no., pp. 90- 480 vol.1, 2003
[32] Shih-An Yu; Kinget, P.; , 'A 0.65-V 2.5-GHz Fractional-N Synthesizer With Two-Point 2-Mb/s GFSK Data Modulation,' Solid-State Circuits, IEEE Journal of , vol.44, no.9, pp.2411-2425, Sept. 2009
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/65056-
dc.description.abstract近年來,老年人口的快速增加超越我們可提供醫療的能力。使用無線監測與紀錄的技術來幫助病人即時的獲得生理參數是必要的。因此,本論文將針對植入式醫療通訊系統提出了兩個頻率合成器與三個射頻發射器。
本篇論文所提出的整數型及分數型頻率合成器實作在台積電0.18 微米製程,用來產生精準的頻率來當作本地振盪器。整數型的頻率合成器比較容易整合在射頻收發機系統,而分數型頻率合成器在規格上是優於整數型頻率合成器。此外,為了降低功率消耗,這兩個頻率合成器都是操作在低電壓1伏特,其功率消耗分別為900微瓦及850微瓦。
三個射頻發射器也被實作在台積電 0.18 微米製程,第一個是開關鍵移發射器,此發射器的實現是較低成本,而且當在傳輸資料“0”的時候是可以被完全關閉。然而,頻率鍵移調變較不容易受環境雜訊干擾,因此實作了兩個頻率鍵移發射器。使用開迴路架構的頻率鍵移發射器有較低的功率消耗,而使用兩點調變技術的頻率鍵移發射器具有較好的調變品質。
zh_TW
dc.description.abstractIn recent years, a rapidly aging population is far outstripping our ability to provide services to support it. Using wireless monitoring and recording for real-time physiological parameters from a patient body is necessary. Therefore, two frequency synthesizers and three RF transmitters are proposed in this thesis for MICS band application.
The integer-N frequency synthesizer and the fractional-N frequency synthesizer implemented TSMC 0.18-um CMOS process play the role of a local oscillator (LO) to generate a precisely defined frequency. The integer-N frequency synthesizer is easy to integrate with RF transceiver system. The fractional-N frequency synthesizer has better performance than the other. In addition, two frequency synthesizers are designed at low supply voltage 1 V in order to reduce the power consumption and power consumption of two frequency synthesizers is 900 uW and 850 uW, respectively.
Besides, three RF transmitters are implemented in TSMC 0.18-um CMOS process. The OOK transmitter is easier to implement at a lower cost and it can be turned off completely when transmitting a “zero”. However, FSK modulation has more immunity to noise from environment. Therefore, two types of FSK transmitter are implemented. The FSK transmitter with open-loop topology has lower power consumption and the FSK transmitter with two-point modulation technique has better modulation quality.
en
dc.description.provenanceMade available in DSpace on 2021-06-16T23:19:29Z (GMT). No. of bitstreams: 1
ntu-101-R99943139-1.pdf: 7379039 bytes, checksum: d2237ec1a23f0944c7d0bf5f3fe43cb0 (MD5)
Previous issue date: 2012
en
dc.description.tableofcontentsTable of Contents…………………………………………………………………………I
List of Figures…………………………..…………………………………………….…V
List of Tables…………………………………………………………………………XIII
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Thesis Organization 3
Chapter 2 Fundamentals of Phase-Locked Loops 5
2.1 Basic PLL Operation 6
2.2 General Considerations 7
2.2.1 Phase Noise 8
2.2.2 Spurs 11
2.2.3 Acquisition Time 13
2.3 Building Blocks of Charge Pump PLL 15
2.3.1 Phase/Frequency Detector (PFD) 15
2.3.2 Charge Pump (CP) 18
2.3.3 Loop Filter 23
2.3.4 Voltage-Controlled Oscillator (VCO) 25
2.3.5 Frequency Divider 27
2.4 Linear Model of PLL 30
2.5 Charge Pump PLL Design 32
2.5.1 Second-Order PLL 32
2.5.2 Third-Order PLL 34
2.5.3 Fourth-Order PLL 36
2.6 Phase Noise Analysis 38
Chapter 3 Integer/Fractional-N Frequency Synthesizers for Medical Implant Communication Service (MICS) 43
3.1 Introduction 43
3.2 Integer/Fractional-N Frequency Synthesizers 45
3.2.1 Integer-N Frequency Synthesizers 45
3.2.2 Fractional-N Frequency Synthesizers 46
3.3 Integer -N Frequency Synthesizers I 50
3.3.1 Architecture 50
3.3.2 LC VCO 51
3.3.3 Truly Modular Divider with Division Ratio Extension 56
3.3.4 Switched-Delay Phase/Frequency Detector 64
3.3.5 4-bit Control Charge Pump 66
3.3.6 Third-Order Loop Filter 68
3.4 Fractional-N Frequency Synthesizer II with Two-Point Modulation 1 70
3.4.1 Architecture 70
3.4.2 LC-VCO With A 4-bit Switched-Capacitor Array 71
3.4.3 ΔΣ Modulator 76
3.4.3 Two-Point Modulation Technique for Fast Settling Time 81
3.4.4 Digital-to-Analog Converter (DAC) 83
3.4.5 PFD/CP and Loop Filter 85
3.4.6 Five-Stage Truly Modular Programmable Divider 87
3.4.7 Three-Wire Control Interface 88
3.5 Measurement Results 89
3.5.1 Frequency Synthesizer I 89
3.5.2 Frequency Synthesizer II 95
3.6 Summary 104
Chapter 4 Low Power Transmitters for Medical Implant Communication Service (MICS) 107
4.1 Introduction 107
4.2 Digital Modulation 109
4.2.1 OOK Modulation 109
4.2.2 FSK Modulation 111
4.3 A Low Power OOK Transmitter 112
4.3.1 Architecture 112
4.3.2 Voltage Controlled Ring Oscillator with OOK modulation 113
4.3.3 Power Amplifier 117
4.4 An Open-Loop FSK Transmitter 119
4.4.1 Architecture 119
4.4.2 LC-tank VCO with 4-bit capacitor arrays 120
4.4.3 Power Amplifier 121
4.5 A PLL-Based FSK Transmitter with Two-Point Modulation Technique 123
4.5.1 Architecture 124
4.6 Measurement Results 126
4.6.1 Low Power OOK Transmitter 126
4.6.2 Open-Loop FSK Transmitter 133
4.6.3 FSK Transmitter with Two-Point Modulation Technique 138
4.7 Summary 141
Chapter 5 Conclusion 145
References…………………………………………………………………………….149
dc.language.isoen
dc.title適用於植入式醫療通訊頻段之低功率頻率合成器及射頻發射器zh_TW
dc.titleLow Power Frequency Synthesizers and RF Transmitters for MICS Banden
dc.typeThesis
dc.date.schoolyear100-2
dc.description.degree碩士
dc.contributor.oralexamcommittee孫台平,孟慶宗,林佑昇
dc.subject.keyword鎖相迴路,頻率合成器,發射器,植入式醫療通訊系統,zh_TW
dc.subject.keywordPLL,frequency synthesizer,transmitter,MICS band,en
dc.relation.page152
dc.rights.note有償授權
dc.date.accepted2012-08-01
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電子工程學研究所zh_TW
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