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標題: | 在5G機器型態通訊下基於稀疏碼多工存取空中傳輸的接收機設計與實作 Design and Implementation of an Over-The-Air SCMA-Based Receiver for 5G NR Machine Type Communications |
作者: | Jyun-Cheng Lai 賴俊丞 |
指導教授: | 闕志達(Tzi-Dar Chiueh) |
關鍵字: | 非正交多工存取,稀疏碼多工存取,訊息傳遞演算法,基於FPGA基頻接收機,軟體定義無線電, Non-Orthogonal Multiple Access,Sparse Code Multiple Access,Message Passing Algorithm,FPGA-based baseband receiver,software-defined radio, |
出版年 : | 2020 |
學位: | 碩士 |
摘要: | 物聯網(IoT)時代的情景是,主控端需要同時和大量的聯網裝置進行傳輸通訊,例如像是在工廠內控制大量機械手臂或是主控端控制所有城市內的路燈號誌。物聯網型態通訊(MTC)在設計上有許多被要求的特性和過往不同,例如低傳輸成本、低傳輸功耗等等,以提升物連型態傳輸效益。5G NR制定了三大應用場景,其中大規模機器通訊(mMTC)和低延遲高可靠度通訊(URLLC)和物聯型態通訊較有關。而其中IoT大連結數量的挑戰和其背後的商業利益促使了近幾年大量的人投入在非正交多工存取(NOMA)系統的研究中。
稀疏碼多工存取(SCMA)是一個基於碼簿的非正交多工存取技術,在3GPP候選多工存取方案中廣為人知。其優點在於可以提高頻譜效益,不過缺點在於解碼的方法使用了訊息傳遞演算法(MPA)下,計算複雜度仍偏高。因此,為了解決這個問題,大量的研究提出了各式各樣版本的低複雜度訊息傳遞演算法。在這本論文中,我們提出了一種基於位元LLR門檻早停訊息傳遞演算法(LLRES MPA),降低複雜度外同時達到較佳的錯誤率表現。 此外,軟體定義無線電(SDR)是開發新通訊系統的熱門解決方案。而在FPGA提供了強大的計算能力和極高的操作速度。因此在這本論文中,我們也實現了一個有在空中傳輸(OTA)的稀疏碼多工存取展示,我們設計並整合了基於稀疏碼多工存取過載率因子(OF)在150%下的軟體定義無線電上行收發機系統。其中,我們的接收機由Xilinx FPGA、NI USRP RF收發機模組、Intel Xeon處理器組成,並將最後結果透過使用者介面顯示出來。 另外,在5G NR規格尚未完全確定的情況下,我們可以根據此FPGA軟體定義無線電平台做為基礎,加速後續開發新一代通訊演算法和驗證驗算法效能的流程,快速滿足新制定的通訊規格。 Internet-of-thing (IoT) refers to the wired or wireless exchange of digital information between a host and the huge number of connected devices, such as robotic arms in the factory, or all of the traffic lights in the city. It is expected to enable low-cost control that provides much more energy-efficient communications. Massive machine-type communications (mMTC) and ultra-reliable and low latency communications (URLLC) are two of the three major scenarios in 5G NR communication related to IoT problems. Their challenges and commercial potential have prompted researchers to engage in developing non-orthogonal multiple-access (NOMA) techniques recently. Sparse code multiple access (SCMA) is a codebook-based NOMA technique of 3GPP MA candidates that can improve the spectral efficiency (SE) at the expense of using a high complexity in decoding. To overcome the drawback, many research works on reducing the decoding complexity by various versions of the message passing algorithm (MPA). In this thesis, we proposed a low complexity and high-performance message-passing decoding method with checking user bit LLR and early-stopping criterion. Additionally, software-defined radio (SDR) has become an attractive approach solution that can implement the new communication system efficiently. Powerful computing ability on FPGA can enable the system to operate at a higher clock rate. So in the over-the-air (OTA) SCMA demonstration, we design and integrate a real-time software-defined radio solution for an overloading factor of 150% SCMA-based uplink transceiver. Our receiver integrated an FPGA with a large number of logic resources, a well-developed commercial RF module, an Intel Xeon server and an open-source graphical user interface application to show the final results. Finally, we believe the proposed flexible FPGA-based software-defined-radio system can serve as a platform for the quick development and verification of a 5G NR prototype with minor modification. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/64750 |
DOI: | 10.6342/NTU202000572 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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