5.8 GHz單端轉差動並使用變壓器匹配的CMOS低雜訊放大器

Abstract

行動運算裝置的普及造成無線區域網路(WLAN)需求成長，家庭中或辦公室裡的無線區域網路裝置讓吾人很方便聯結使用網際網路，而許多無線區域網路裝置使用5GHz的非授權頻帶。為滿足消費者的需求，無線區域網路裝置必須符合低價、輕、小及功耗低等特性，其關鍵零組件之一即是射頻前端發射與接收元件。射頻前端電路通常應用差動式設計，以極小化地線雜訊對低雜訊放大器的影響，因此必須以Baluns作為單端天線與差動式射頻電路之間的介面。 本研究主題乃是一個雙級式5.8 GHz單端轉差動低雜訊放大器，具有低功耗、小面積及低成本等優點。此一特殊的低雜訊放大器使用中央tapped變壓器，以提供偏壓及使輸入阻抗、輸出阻抗及雜訊達到最佳的匹配。單端級和差動級使用傳統的cascode inductively degenerated common source amplifier設計架構，兩級之間以互補式金屬傳輸線(CCS TL)設計Marchand Balun，將單端訊號轉成差動訊號；本低雜訊放大器設計使用0.13 μm CMOS邏輯製程技術，面積為720 μm × 1835 μm，其增益為17.9 dB，雜訊為5.39 dB；此低雜訊放大器在1.2伏特的偏壓時，功耗為26.4 mW，達成低功耗及低成本設計目標。

The spread of mobile computing devices has increased the demand for wireless local networks (WLAN). WLANs can be set up at home or at the workplace to serve as a convenient way to access the internet. Many WLAN devices utilize the unlicensed frequencies in the 5 GHz band. Consumer demand requires WLAN devices that are low cost, small in size, lightweight, and have a long battery life. A crucial component for WLAN devices are the radio frequency (RF) front-end transceivers. Typically, the RF front-end circuits are differential to minimize the effect of ground noise on a low noise amplifier (LNA). Thus, Baluns are required to interface the single-ended antenna with the differential RF circuits. In this thesis, a two-stage single-ended to differential 5.8 GHz LNA is presented. This particular LNA utilizes center tapped transformers to provide bias voltages and to reach optimal matching for input impedance, output impedance, and noise. The architecture used is the cascode inductively degenerated common source amplifier for both stages. A complementary-conducting-strip transmission line (CCS TL) based Marchand Balun was used in between the stages to convert the single ended signal into a differential signal. The LNA is fabricated in a standard 0.13 μm 1P8M CMOS process. The gain for the proposed single-ended to differential LNA is 17.9 dB with a noise figure of 5.39 dB. This LNA consumes 26.4 mW of power using a 1.2 V bias voltage. The area of the proposed amplifier is 720 μm × 1835 μm excluding an output balun for measurement.