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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/6241完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 胡振國(Jenn-Gwo Hwu) | |
| dc.contributor.author | Chien-Wei Lee | en |
| dc.contributor.author | 李建緯 | zh_TW |
| dc.date.accessioned | 2021-05-16T16:23:56Z | - |
| dc.date.available | 2013-12-31 | |
| dc.date.available | 2021-05-16T16:23:56Z | - |
| dc.date.copyright | 2013-07-08 | |
| dc.date.issued | 2013 | |
| dc.date.submitted | 2013-07-03 | |
| dc.identifier.citation | [1] H. C. Card and E. H. Rhoderick, “Studies of tunnel MOS diodes II. Thermal Equilibrium Considerations,” J. Phys. D 4, pp. 1602-1611, 1971.
[2] Y. P. Lin and J. G. Hwu, “Oxide Thickness Dependent Suboxide Width and Its Effect on Inversion Tunneling Current,” J. Electrochem. Soc., Vol. 151, pp. G853-G857, 2004. [3] T. M. Wang, C. H. Chang, S. J. Chang, and J. G. Hwu, “Comparison of Saturation Current Characteristics for Ultra-thin Silicon Oxides Grown on N- and P-type Silicon Substrates Simultaneously,” J. Vac. Sci. Technol. A 24(6), pp. 2049-2053, 2006. [4] P. F. Schrnidt and W. Michel, “Anodic Formation of Oxide Films on Silicon,” J. Electrochem. Soc., Vol. 104, pp. 230-236, 1957. [5] C. C. Ting, Y.H. Shih, and J. G. Hwu, “Ultra Low Leakage Characteristics of Ultra-thin Gate Oxides (~3 nm) Prepared by Anodization Followed by High Temperature Annealing,” IEEE Trans. Electron Devices, Vol.49, pp.179-181, 2002 [6] K. J. Yang and C. Hu, “MOS Capacitance Measurements for High-Leakage Thin Dielectrics,” IEEE Trans. Electron Devices, Vol. 46, pp. 1500-1501, 1999. [7] C. H. Choi, Y. Wu, J. S. Goo, Z. Yu, and R. W. Dutton, “Capacitance Reconstruction from Measured C–V in High Leakage, Nitride/Oxide MOS,” IEEE Trans. Electron Device, Vol. 47, pp. 1843-1850, 2000. [8] W. H. Wu, B. Y. Tsui, Y. P. Huang, F. C. Hsieh, M. C. Chen, Y. T. Hou, Y. Jin, H. J. Tao, S. C. Chen, and M. S. Liang, “Two-Frequency C–V Correction Using Five-Element Circuit Model for High-k Gate Dielectric and Ultrathin Oxide,” IEEE Electron Device Lett., Vol. 27, pp. 399-401, 2006 [9] Kevin Yang, Ya-Chin King, and Chenming Hu, “Quantum Effect in Oxide Thickness Determination From Capacitance Measurement,” Symposium on VLSI Technology Digest of Technical Papers, pp. 77-78, 1999. [10] Berkeley Device Group. [Online] Available: http://www-device.eecs.berkeley.edu/index.htm [11] R. Castagne and A. Vapaille “Description of the SiO2---Si interface properties by means of very low frequency MOS capacitance Measurements,” Suface Sci., Vol. 28, pp. 157-193, 1971. [12] L. Wang, D. Wang, and P. M. Asbeck, “A numerical Schrodinger–Poisson solver for radially symmetric nanowire core–shell structures,” Solid-State Electron., vol. 50, pp. 1732-1739, 2006. [13] F. Stern and W. E. Howard, “Properties of Semiconductor Surface Inversion Layers in the Electric Quantum Limit,” Phys. Rev., Vol. 163, pp. 816-835, 1967. [14] A. P. Gnadinger and H. E. Talley, “Quantum Mechanical Calculation of the Carrier Distribution and the Thickness of the Inversion Layer of a MOS Field-Effect Transistor,” Solid-State Electron., Vol. 13, pp. 1301-1309, 1970. [15] T. Ando, A. B. Fowler, and F. Stem, “Electronic Properties of Two-dimensional Systems,” Rev. Mod. Phys., Vol. 54, pp. 437-672, 1982. [16] J. Sune, P. Olivo, and B. Ricco, “Self-consistent Solution of the Poisson and Schrodinger equations in Accumulated Semiconductor Insulator Interfaces,” J. Appl. Phys., vol. 70 (l), pp. 337-345, 1991. [17] F. Stern, Phys. Rev. B 5, 4891 (1972). [18] D. G. Zill and M. R. Cullen, Differential Equations with Boundary-Value Problems, Fifth Edition (Brooks/Cole, 2001). [19] D. G. Swanson, “Quantum Mechanics: Foundations and Applications,” Taylor & Francis, 2007. [20] J. Robertson, “High Dielectric Constant Oxides,” Eur. Phys. J. Appl. Phys., vol. 28, pp. 265–291, 2004. [21] A. Asgari, M. Kalafi, and L. Faraone, “Effects of Partially Occupied Sub-bands on Two-dimensional Electron Mobility in AlxGa1-xN/GaN Heterostructures,” J. Appl. Phys., Vol. 95, pp. 1185-1190, 2004. [22] M. Gonschorek, J.-F. Carlin, E. Feltin, M. A. Py, N. Grandjean, V. Darakchieva, B. Monemar, M. Lorenz, and G. Ramm, “Two-dimensional Electron Gas Density in Al1−xInxN/AlN/GaN Heterostructures (0.03≤x≤0.23),” J. Appl. Phys., Vol. 103, 093714, 2008. [23] D. A. Neamen, “Semiconductor Physics And Devices, 3rd edition,” McGraw-Hill, 2002. [24] J. R. Hauser and K. Ahmed, “Characterization of ultra-thin oxides using electrical C-V and I-V measurements,” AIP Conf. Proc., Vol. 449, pp. 235-239, 1998. [25] J. A. Lopez-Villanueva, I. Melchor, F. Gamiz, J. Banqueri, and J. A. Jimenez-Tejada, “A Model for the Quantized Accumulation Layer in Metal-Insulator-Semiconductor Structures,” Solid-State Electron., Vol. 38, pp. 203-210, 1995. [26] M. G. Betti, V. Corradini, G. Bertoni, P. Casarini, C. Mariani, and A. Abramo, “Density of states of a two-dimensional electron gas at semiconductor surfaces,” Phys. Rev. B, Vol. 63, 155315, 2001. [27] S. A. Hareland, S. Kzlshnamurthy, S. Jallepalli, C.-F. Yeap, K. Hasnat, A. F. Tasch, Jr., and C. M. Maziar, “A Computationally Efficient Model for Inversion Layer Quantization Effects in Deep Submicron N-Channel MOSFET’s,” IEEE Trans. Electron Device, Vol.43, pp. 90-96, 1996). [28] S. A. Hareland, S. Jallepalli, W.-K. Shih, H. Wang, G. L. Chindalore, A. F. Tasch, and C. M. Maziar, “A Physically-Based Model for Quantization Effects in Hole Inversion Layers,” IEEE Trans. Electron Device, Vol. 45, pp. 179-186, 1998. [29] M.I. Vexler, “A Simple Quantum Model for the MOS Structure in Accumulation Mode,” Solid-State Electron., vol. 47, pp. 1283–1287, 2003. [30] G. Paasch and H. Ubensee, “A Modified Local Density Approximation. Electron Density in Inversion Layers,” Phys. Stat. Sol. (b), Vol. 118, pp. 165-178, 1982. [31] C. Jungemann, C. D. Nguyen, B. Neinh‥us, S. Decker and B. Meinerzhagen, “Improved Modified Local Density Approximation for Modeling of Size Quantization in NMOSFETs,” Tech. Proc. of the 2001 Intern. Conf. on Modeling and Simulation of Microsystems, 2001. [32] “On the Separation of Bulk and Surface Components of Lifetime Using the Pulsed MOS Capacitor,” Solid-State Electron., Vol. 13, pp. 577-582, 1970. [33] J. Y. Cheng, C. T. Huang, and J. G. Hwu, “Comprehensive study on the deep depletion capacitance-voltage behavior for metal-oxide-semiconductor capacitor with ultra-thin oxides,” J. Appl. Phys, Vol.106, pp. 074507, 2009. [34] Yu Yuan, Lingquan Wang, Bo Yu, Byungha Shin, Jaesoo Ahn, Paul C. McIntyre, Peter M. Asbeck, Mark J. W. Rodwell, and Yuan Taur, “A Distributed Model for Border Traps in Al2O3−InGaAs MOS Devices,” IEEE Electron Device Lett., Vol. 32, pp. 485-487, 2011. [35] S. M. Sze, K. K. Ng, “Physics of Semiconductor Devices, 3rd Edition,” Wiley-Interscience, 2006. [36] R. Tsu and L. Esaki, 'Tunneling in a Finite Superlattice,' Appl. Phys. Lett., vol. 22, pp. 562-564, 1973. [37] A. Gehring, T. Grasser, H. Kosina, and S. Selberherr, “Simulation of hot-electron oxide tunneling current based on a non-Maxwellian electron energy distribution function,” J. Appl. Phys., Vol. 92, pp. 6019-6021, 2002. [38] A. Gehring, “Simulation of Tunneling in Semiconductor Devices,” Ph. D. dissertation, 2003. [39] T. Y. Chen and J. G. Hwu, “Two States Phenomenon in the Current Behavior of Metal-Oxide-Semiconductor Capacitor Structure with Ultra-thin SiO2,” Appl. Phys. Lett., Vol.101, pp. 073506, 2012. [40] L. B. Freeman and W. E. DAHLKE, “Theory of Tunneling into Interface States,” Solid-State Electron., Vol. 13, pp. 1483-1503, 1970. [41] M. Y. Doghish and F. D. Ho, “Comprehensive Analytical Model for Metal-Insulator-Semiconductor (MIS) Devices,” IEEE Trans. Electron Device, Vol. 39, pp. 2771-2780, 1992. [42] B. Brar, G. D. Wilk, and A. C. Seabaugh, “Direct Extraction of the Electron Tunneling Effective Mass in Ultrathin SiO2” Appl. Phys. Lett., Vol. 69, pp. 2728-2730, 1996. [43] Y. T. Hou, M. F. Li, Y. Jin, and W. H. Lai, “Direct Tunneling Hole Currents Through Ultrathin Gate Oxides in Metal-Oxide-Semiconductor Devices,” J. Appl. Phys., Vol. 91, pp. 258-264, 2002. [44] M. I. Vexler, S. E. Tyaginov, and A. F. Shulekin, “Determination of the Hole Effective Mass in Thin Silicon Dioxide Film by Means of an Analysis of Characteristics of a MOS Tunnel Emitter Transistor,” J. Phys. Condens. Matter, Vol. 17, pp. 8057-8068, 2005. [45] C. D. Wang, C. Y. Zhu, G. Y. Zhang, J. Shen, and L. Li, “Accurate Electrical Characterization of Forward AC Behavior of Real Semiconductor Diode: Giant Negative Capacitance and Nonlinear Interfacial Layer,” IEEE Trans. Electron Device, Vol. 50, pp. 1145-1148, 2003. [46] R. G. Hunsperger, “Integrated Optics: Theory and Technology, 6th edition,” Springer, 2009. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/6241 | - |
| dc.description.abstract | 本研究分為兩大部分。在第一部分中，提出了一個新的統計物理模型，用於計算二維電子氣之態密度，並提出較精準的表面位能近似方法，用於計算金氧半結構在積累、強反型區的量子效應。本研究使用指數函數來近似表面位能並解得表面量子化能階，此外，採用了不準確原理和動量空間中的薛定鍔方程來估算在二維、三維過渡區的態密度。模擬的結果顯示出我們所提出的近似方法以及態密度理論可以有效的解決先前研究的兩大問題：因為使用線性函數來近似表面位能所造成不可忽略的誤差，以及由二維態密度過渡到三維態密度中所產生的態密度以及電荷濃度分佈的不一致性。
在第二部分，我們透過實驗量測出不同氧化層厚度的超薄金氧半結構的電容-電壓和電流-電壓特性曲線。超薄氧化層結構中的氧化層是由陽極氧化法生長，而厚度之測定是藉由對比量測所得的電容-電壓曲線與理論的電容-電壓特性曲線，其氧化層厚度介於1.8奈米到2.8奈米之間。而在另一方面，自撰程式模擬的電容-電壓與電流-電壓特性，主要是基於以下原則：1.應用本研究第一部分提出之理論 2.用修改過的Tsu-Esaki模型計算氧化層穿隧電流 3.計算出不同閘極偏壓時，準費米能階與熱平衡費米能階的能量差異，從而算出複合-產生電流 4.考慮閘極周圍的邊際電場效應。模擬的結果與實驗對照顯示出我們的理論模型成功的解釋了超薄金氧半結構的電容-電壓與電流-電壓特性曲線。這是世界上能第一個可以定性說明並量化模擬超薄金氧半結構的的深空乏電容-電壓關係與其特殊的電流-電壓特性曲線的研究。 | zh_TW |
| dc.description.abstract | This research is divided into two parts. In the first part, we derive a new statistical physics model of two-dimensional electron gas (2DEG) and propose an accurate approximation method for calculating the quantum-mechanical effects of metal-oxide-semiconductor (MOS) structure in accumulation and strong inversion regions. We use an exponential surface potential approximation in solving the quantization energy levels and derive the function of density of states in 2D to 3D transition region by applying uncertainty principle and Schrodinger equation in k-space. The simulation results show that our approximation method and theory of density of states solve the two major problems of previous researches: the non-negligible error caused by the linear potential approximation and the inconsistency of density of states and carrier distribution in 2D to 3D transition region.
In the second part, we extracted the C-V and I-V data of the ultrathin MOS structures with different oxide thicknesses from experiments. The oxide layer of the ultrathin MOS capacitors are grown by anodic oxidation (ANO), and the physical thickness of the oxide layer is 1.8nm~2.8nm, which is estimated by fitting C-V curves with theoretical data of previous researches. On the other hand, the simulated C-V and I-V curves are obtained by: 1. applying the theories established in the first part, 2. calculating the tunneling current by a modified Tsu-Esaki model, 3. estimating the energy difference between electron quasi-Fermi level and hole quasi-Fermi level and the generation-recombination current, 4. considering the fringing field effect at the edge of the electrode. The results show that our model successfully explain the differences laid in MOS C-V and I-V characteristics with different doping types of substrates. This is the first research in the world which both qualitatively and quantitatively explains the deep-depletion C-V curves in leaky MOS cases and the unusual I-V characteristics of MOS(p) in reverse-biased region. | en |
| dc.description.provenance | Made available in DSpace on 2021-05-16T16:23:56Z (GMT). No. of bitstreams: 1 ntu-102-R00943061-1.pdf: 4731752 bytes, checksum: d317795ee9b6be22aab4251cbe0ebb5a (MD5) Previous issue date: 2013 | en |
| dc.description.tableofcontents | 摘要-------------------------------------------------------------------------------------------------------------------I
Abstract--------------------------------------------------------------------------------------------------------------III Contents--------------------------------------------------------------------------------------------------------------V Table Captions-----------------------------------------------------------------------------------------------------VII Figure Captions--------------------------------------------------------------------------------------------------VIII Chapter 1 Introduction---------------------------------------------------------------------------------------------1 1-1 Motivation----------------------------------------------------------------------------------------------1 1-2 Experimental-------------------------------------------------------------------------------------------2 1-3 Simulation Tools---------------------------------------------------------------------------------------3 1-4 Measurements------------------------------------------------------------------------------------------6 1-4-1 Capacitance Correction-----------------------------------------------------------------------6 1-4-2 Thickness of Oxide Layer---------------------------------------------------------------------7 1-4-3 Interface Trap Density Extraction-----------------------------------------------------------8 Chapter 2 Theory of Quantization Effects in MOS Accumulation and Strong Inversion Layer-----14 2-1 Introduction and Problems with Previous Researches--------------------------------------------14 2-2 An Exponential Surface Potential Approximation Approach-------------------------------------18 2-3 Theory of Density of States with Uncertainty Principle Correction-----------------------------24 2-4 Discussion-----------------------------------------------------------------------------------------------29 2-4-1 Simplifications Used in the Simulations--------------------------------------------------29 2-4-2 Applying the Method to Hole Accumulation Case--------------------------------------31 2-4-3 The Solution of the Inconsistency Problem in Previous Researches-----------------32 2-4-4 The Validation of Some Assumptions Used in This Work------------------------------34 Chapter 3 Theoretical C-V & I-V Model and Experimental Verification of Ultrathin MOS Structures -------------------------------------------------------------------------------------------------------------------------62 3-1 Introduction----------------------------------------------------------------------------------------------63 3-2 Measured C-V & I-V Characteristics of Ultrathin MOS Structures and the Failure of TCAD Simulations---------------------------------------------------------------------------------------------------64 3-3 New Theoretical model for C-V and I-V Characteristics of Ultrathin MOS Structure--------67 3-3-1 Method for Calculating the Quasi-Fermi Level Near the Si-SiO2 Interface--------67 3-3-2 A Modified Tsu-Esaki Model for Calculating the Tunneling Current in Ultrathin MOS Structure--------------------------------------------------------------------------------------69 3-3-3 Qualitative Analysis of C-V and I-V Characteristics of Ultrathin MOS(n) Structure --------------------------------------------------------------------------------------------------------71 3-3-4 Qualitative Analysis of C-V and I-V Characteristics of Ultrathin MOS(p) Structure --------------------------------------------------------------------------------------------------------72 3-4 Simulations, results, and Discussion-----------------------------------------------------------------76 3-4-1 Simplifications used in the simulation----------------------------------------------------76 3-4-2 Results and Discussion of ultrathin MOS(n) structures--------------------------------78 3-4-3 Results and Discussion of ultrathin MOS(p) structures--------------------------------78 3-5Applications of the Model-------------------------------------------------------------------------------80 3-5-1 MOS C-V and I-V Behaviors in Illuminated Environment-----------------------------80 3-5-2 MOS C-V and I-V Behaviors after Long Period Injection Current Stress-----------82 Chapter 4 Conclusion & Future Works------------------------------------------------------------------------110 4-1 Conclusion----------------------------------------------------------------------------------------------110 4-2 Future Works-------------------------------------------------------------------------------------------112 References---------------------------------------------------------------------------------------------------------116 Appendix I---------------------------------------------------------------------------------------------------------123 Appendix II--------------------------------------------------------------------------------------------------------128 Appendix III-------------------------------------------------------------------------------------------------------130 | |
| dc.language.iso | en | |
| dc.title | 超薄金氧半結構電容-電壓與電流-電壓特性之量子力學模型與驗證 | zh_TW |
| dc.title | A Comprehensive Quantum-Mechanical Model for C-V and I-V Characteristics in Ultrathin MOS Structure and Experiment Verification | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 101-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 鄭晃忠(Hwang-Chung Cheng),王維新(Way-Seen Wang) | |
| dc.subject.keyword | 金氧半結構,表面量子化,不準確原理,穿隧電流, | zh_TW |
| dc.subject.keyword | MOS structure,Surface quantization,Uncertainty principle,Tunneling current, | en |
| dc.relation.page | 138 | |
| dc.rights.note | 同意授權(全球公開) | |
| dc.date.accepted | 2013-07-03 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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