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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 李建模 | |
dc.contributor.author | Wei-Sheng Ding | en |
dc.contributor.author | 丁瑋陞 | zh_TW |
dc.date.accessioned | 2021-06-16T13:30:05Z | - |
dc.date.available | 2013-07-30 | |
dc.date.copyright | 2013-07-30 | |
dc.date.issued | 2013 | |
dc.date.submitted | 2013-07-22 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/62142 | - |
dc.description.abstract | 本論文提出一個新穎的想法去修改測試向量為了減少在捕獲週期時間平均的電壓降。我們提出了一個快速的平均電壓降的估計,它和耗時的暫態電壓降分析結果非常相近(R2 =0.99)。我們計算每一個節點對於在電壓降熱點中節點的貢獻量為了我們可以僅僅修改一點點部分有效地修改測試向量去降低電壓降。實驗結果顯示我們的技術成功的降低時間平均電壓降達10%,並且幾乎沒有任何的錯誤涵蓋率的下降,也幾乎沒有任何測試向量的膨脹。我們提出的技術相對於考慮功率的自動測試向量產生器有較短的測試向量、較低的電壓降、較高的錯誤涵蓋率。 | zh_TW |
dc.description.abstract | This thesis presents a novel technique that modifies ATPG test patterns to reduce time-averaged IR drop of a test pattern in capture cycles. We propose a FAIR estimation, which is very close to the time-averaged IR drop of time-consuming transient simulation (R2 =0.99). We calculate the contribution of every node to these nodes inside IR-drop hotspot so that we can effectively modify only a few don’t care bits in the test patterns to reduce IR drop. Experimental results show that our technique successively reduce time-averaged IR drop by 10% with almost no fault coverage loss and no test inflation. The proposed technique generates shorter test sets with lower IR drop and higher fault coverage than commercial power-aware ATPG. | en |
dc.description.provenance | Made available in DSpace on 2021-06-16T13:30:05Z (GMT). No. of bitstreams: 1 ntu-102-R00943088-1.pdf: 4119016 bytes, checksum: 11a6d07bff2a15783ef2aa173f41fc8f (MD5) Previous issue date: 2013 | en |
dc.description.tableofcontents | Chapter 1 Introduction 1
1.1 Motivation 1 1.2 Proposed Techniques 5 1.3 Contributions 7 1.4 Organization 8 Chapter 2 Background 9 2.1 Prior work in low power testing 9 2.2 Traditional Random Walk 14 2.3 Representative Random Walk 20 Chapter 3 Proposed Techniques 27 3.1 Overall Flow 27 3.2 Modified representative network 29 3.3 Contribution 31 3.4 Fast average IR drop (FAIR) estimation 35 3.5 Current model 37 3.6 Test pattern modification 40 Chapter 4 Experimental Results 47 4.1 Experimental Setup 47 4.2 Comparison with a commercial low-power ATPG 48 Chapter 5 Conclusion and Future Work 53 References 56 | |
dc.language.iso | en | |
dc.title | 用於降低平均電壓降之測試向量修改 | zh_TW |
dc.title | Test Pattern Modification for Average IR-drop Reduction | en |
dc.type | Thesis | |
dc.date.schoolyear | 101-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 黃俊郎,陳中平,劉建男 | |
dc.subject.keyword | 電壓降,測試向量修改,低功率測試, | zh_TW |
dc.subject.keyword | IR drop,test pattern modification,low-power testing, | en |
dc.relation.page | 60 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2013-07-22 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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