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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 楊佳玲(Chia-Lin Yang) | |
dc.contributor.author | Hitoshi Mizunuma | en |
dc.contributor.author | 水沼仁志 | zh_TW |
dc.date.accessioned | 2021-06-16T10:40:06Z | - |
dc.date.available | 2013-08-16 | |
dc.date.copyright | 2013-08-16 | |
dc.date.issued | 2013 | |
dc.date.submitted | 2013-08-13 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/60989 | - |
dc.description.abstract | 3D stacking with TSV technology is expected to change the IC design paradigm. It not only allows us to integrate heterogeneous components but also overcomes the limitations with respect to delay, bandwidth, and energy consumption of the interconnects. Hence, the whole microelectronic systems previously requiring multiple discrete components such as processors (cores), memories, sensors, and RF devices on the printed circuit board could be now built in a form of the single systems-on-a-chip. The high operating temperature and large thermal imbalance are one of the major design constraints for aggressively stacked 3D ICs, especially for multi-core systems. It is difficult to remove heat from inside of ICs as cores are located at different layers and have significantly different heating/cooling rates in comparison to conventional 2D ICs. 3D multi-core systems also suffer from large temporal and spatial temperature fluctuation due to workload variations by time and among cores. IC designers proposed a number of design-time and run-time thermal management techniques for 3D multi-core systems. However, IC-level thermal management alone is not enough to keep 3D ICs away from thermal emergency as the trend of ever increasing number of cores and stacked layers pushes the power density to the limit of conventional fan-based air-cooled heatsink. Microchannel liquid cooling is an attractive solution for massive heat removal. The underlying concept is to embed the microchannels into the silicon, which acts as a local thermal ground. Shorter vertical distance over which the heat travels around improves heat conduction within solids. In the meant time, the use of channel-flow produces a new type of heat transportation in fluid-solid boundary: heat convection. Furthermore, the heat injected to fluid is moved away through the channels as a result of another type of heat transportation within fluid: heat advection. The extra heat dissipation paths complicate the heat propagation pattern within the microchannel-cooled 3D ICs. The heat generated by a core in the conventional air-cooled 3D ICs propagates only at almost vertical direction because of the back-side attached heatsink that plays dominate role in heat removal. On the other hand, the heat generated by a core in microchannel-cooled 3D ICs propagates vertically via solids as well as horizontally through the fluid. The new cooling technology brings us two challenges. The first challenge is the development of a fast and accurate thermal model to facilitate temperatureaware 3D-IC design. Thermal modeling for microchannel cooling is computationally costly because it requires numerical simulation to solve the conjugate heat transfer (conduction among solids, advection in fluid, and convection between them). The second challenge is the development of thermal management techniques suitable for the microchannel-cooled 3D-ICs. Existing OS-based thermal-aware task scheduler for conventional air-cooled 3D ICs is aware of the vertical heat propagation pattern, thus capable of vertically balancing power and temperature profiles by simply allocating higher-power tasks to the cores closer to the heatsink. However, those schedulers are apparently not effective on microchannel-cooled 3D ICs. In this thesis, we handle the thermal modeling, analysis and management of 3D ICs. The targeted cooling solution for 3D ICs is an integrated microchannel heatsink. The thermal management scheme to be studied is an OS-based on-line task allocation. This thesis is divided into two parts. In the first part, we propose a modeling methodology for microchannel-cooled 3D ICs. Our novel approach, which is our key contribution in this thesis, is that we decouple heat advection from heat conduction/convection, and model the heat advection component using a new kernel function that is extracted off-line and reusable. The advantage of our methodology is that we can re-integrate the kernel function into the conventional heat conduction model that can be solved as efficient as the conventional resistance network model, yet greatly improves the modeling accuracy. Next, to achieve further speedup, we propose Channel-merging technique: multiple microchannels sharing the same core are modeled as a virtual single channel with much fewer grids, which is our second contribution. It is based on the idea that grid density finer than power granularity does not add more useful information from IC design point of view. Validation results show that the modeling error is less than 5 % with more than 3,300x speedup. Finally, we demonstrate the value of our model in thermal-aware placement that reduces the peak temperature by more than 20◦C, which is our third key contribution. In the second part, we present a fast and near-optimal thermal propagation aware task allocation algorithm for microchannel-cooled 3D many-core systems. Our key contribution behind is to derive analytical-model-based guidelines separately in vertical and horizontal direction, and incorporate them into the task allocation algorithm. The most important guideline derived in this study is that the flow descendant order always returns lower hotspot than the flow ascendant order when a certain thermo-hydrodynamical condition is satisfied. The advantage of our idea is that we could evaluate the above condition off-line to know the better allocation policy without knowing the real power consumption of each task. The run-time complexity of the task allocation is as low as O(NlogN) since the on-line task allocation process is automated by those guidelines. The temperature profile obtained is close to optima because those guidelines minimize the vertical and horizontal heat propagations. We compare the obtained temperature profile and the on-line execution time of the proposed scheme against the state-of-the-art near-optimal O(N2logN) algorithm. The experimental results show that the solution obtained by our scheme is very close to the referencing scheme: 0.8◦C and 1.5◦C higher hotspot and spatial thermal imbalance, with 30x - 90x less execution time for 4x4x2 and larger core configurations. | en |
dc.description.provenance | Made available in DSpace on 2021-06-16T10:40:06Z (GMT). No. of bitstreams: 1 ntu-102-F92922128-1.pdf: 1734614 bytes, checksum: 1b68e4b8b8bb925d22c7c4171c62fd94 (MD5) Previous issue date: 2013 | en |
dc.description.tableofcontents | Abstract i
List of Tables viii List of Figures ix Chapter 1. Introduction 1 1.1 The Basics of 3D ICs 1 1.1.1 History and Trends 1 1.1.2 Fabrication Technology 3 1.1.3 Advantages of 3D integration 6 1.2 Thermal Issues in 3D ICs 9 1.2.1 Thermal Models 10 1.2.2 Thermal Management 11 1.2.3 Innovative Cooling Solutions 12 1.3 Thesis Contribution 13 1.4 Thesis Organization 17 Chapter 2. Background 18 2.1 Microchannel Heatsink 18 2.2 Integrated Microchannel Heatsink for 3D ICs 20 Chapter 3. Thermal Modeling and Analysis of Microchannel-cooled 3D ICs 23 3.1 Introduction 23 3.2 Thermal Modeling of Microchannel-cooled 3D ICs 23 3.2.1 Thermal Modeling Techniques 23 3.2.2 Thermal-wakes: A Challenge in Thermal Modeling of Microchannels 28 3.3 Previous Work 32 3.4 Thermal-wake Aware Compact Model 34 3.4.1 Modeling of Heat Convection 35 3.4.2 Modeling of Heat Conduction 43 3.4.3 Integration of Microchannel Thermal-wake Function and Resistance Network 45 3.4.4 Channel-merging 47 3.5 Thermal Model Validation 49 3.5.1 Experimental Setup 49 3.5.2 Experimental Results 51 3.6 Thermal Analysis of Microchannel-cooled 3D ICs 58 3.6.1 Scalability of Microchannel Cooling 58 3.6.2 Thermal-aware Placement: Microchannel vs. Conventional Heatsink 62 Chapter 4. Thermal Management of Microchannel-cooled 3D Manycore Systems 65 4.1 Introduction 65 4.2 Thermal Management 65 4.2.1 Thermal Management Techniques for 3D ICs 65 4.2.2 Thermal-coupling: A Challenge in Task Allocation for 3D ICs 70 4.3 Previous Work 74 4.4 Thermal Characterization of Microchannel-cooled 3D many-core Systems 77 4.4.1 Stream-wise Thermal-coupling Effect 80 4.4.2 Transverse-to-flow Thermal-coupling Effect 84 4.5 Proposed Task Allocation Algorithm for Microchannel-cooled 3D Manycore Systems 85 4.6 Experiments 88 4.6.1 Experimental Setup 88 4.6.2 Experimental Results 89 Chapter 5. Concluding Remarks 92 5.1 Thermal Modeling and Analysis of Microchannel-cooled 3D ICs 92 5.2 Thermal Management of Microchannel-cooled 3D Many-core Systems 93 Bibliography 95 Publication List 106 | |
dc.language.iso | en | |
dc.title | "三維多核心系統晶片之熱流模型,分析與溫度管理" | zh_TW |
dc.title | Thermal modeling, analysis and management in 3D ICs | en |
dc.type | Thesis | |
dc.date.schoolyear | 101-2 | |
dc.description.degree | 博士 | |
dc.contributor.coadvisor | 盧奕璋(Yi-Chang Lu) | |
dc.contributor.oralexamcommittee | 黃俊郎(Jiun-Lang Huang),盧彥文(Yen-wen Lu),陳雅淑(Ya-Shu Chen) | |
dc.subject.keyword | 熱流模型,溫度管理,多核心系統,三維晶片, | zh_TW |
dc.subject.keyword | Thermal modeling,Thermal management,Multi-Processor System-on-Chip,3-Dimensional Integration, | en |
dc.relation.page | 107 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2013-08-13 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 資訊工程學研究所 | zh_TW |
顯示於系所單位: | 資訊工程學系 |
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