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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳信樹(Hsin-Shu Chen) | |
dc.contributor.author | You-Min Lai | en |
dc.contributor.author | 賴佑旻 | zh_TW |
dc.date.accessioned | 2021-06-16T10:13:43Z | - |
dc.date.available | 2018-09-02 | |
dc.date.copyright | 2013-09-02 | |
dc.date.issued | 2013 | |
dc.date.submitted | 2013-08-19 | |
dc.identifier.citation | [1] Robert W. Erickson; Dragan Maksimovic, “Fundamentals of Power Electronics, Second Edition” 2011 by Kluwer Academic Publishers.
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/60213 | - |
dc.description.abstract | 本論文闡述一個預測電壓遲滯控制技術來達到降低暫態突波以及快速暫態響應的直流電壓轉換器,這個技術使用做在晶片裡面的雙級錯誤放大器補償方式作為穩態控制,而當暫態發生的時候會切換預測電壓遲滯控制來加快反應,這個晶片以台積電0.35-μm 2P4M 3.3V/5V Mixed Signal CMOS製程製作。由分析以及模擬結果可以看出,傳統控制的暫態突波相當大,回復時間也需要很久,使用本技術後則會得到不錯的改善。
依據量測的結果,因為受到輸出電壓的高頻突波影響,遲滯預測控制的部分功能會發生錯誤而無法運作。只使用雙級錯誤放大器的暫態回復時間可以改善到25 μs,本晶片切換頻率操作在1 MHz,當輸出電流為190 mA時得到最高效率87%。晶片面積包含on-chip補償總共占1.518 × 1.643mm2,而其它的量測結果也包含在本論文內。 | zh_TW |
dc.description.abstract | This paper presents a hysteresis prediction voltage control (HPVC) method using the predictive strategy with early operations to reduce the transient ripple and minimizes the transient time in dc-dc converter. This HPVC control is composed of on-chip compensated two-stage EA PWM for steady-state PWM control. During transient, the buck converter switches to the HPVC mode to speed up the transient response. This technique is implemented in a standard 0.35-μm 2P4M 3.3V/5V Mixed Signal CMOS process. The analysis and simulation show that without using the HPVC technique in typical PWM dc-dc converter, the transient ripple is larger in magnitude and the transient time is lengthening. After the HPVC technique is applied, the prediction circuit will estimate the variation of voltage that is going to change by detect the capacitor current any time. In this way, the transient ripple can be greatly decreased and the transient time is also reduced.
According to the measurement results, the function of HPVC control failed because of the spike of output voltage. The measurement shows that the recovery time can be improved to 25 μs by using the two-stage EA PWM compared to conventional PWM. The switching frequency of the chip operates at 1MHz, and the maximum efficiency is 87% when load current is 190 mA. The total chip area with on-chip compensated components is 1.518 × 1.643 mm2, and the other detailed measurement is included in this thesis. | en |
dc.description.provenance | Made available in DSpace on 2021-06-16T10:13:43Z (GMT). No. of bitstreams: 1 ntu-102-R99943118-1.pdf: 7858166 bytes, checksum: b36cd92216f5681d331f2092dfb8aef3 (MD5) Previous issue date: 2013 | en |
dc.description.tableofcontents | Table of Contents
致謝 I 摘要 II Abstract III Table of Contents IV List of Figures VI List of Tables X Chapter 1 Introduction 1 1.1 Motivation 3 1.2 Thesis Organization 7 Chapter 2 Fundamental of DC-DC Buck Converter 8 2.1 Performance Metrics 8 2.1.1 Efficiency 8 2.1.2 Regulation 9 2.1.2.1 Line Regulation 10 2.1.2.2 Load Regulation 10 2.1.2.3 Temperature Regulation 11 2.1.3 Transient Response 11 2.2 Architecture of DC-DC Converters 13 2.2.1 DC-DC Buck Converter Operation 14 2.2.2 Estimation of Output Voltage Ripple 19 2.2.3 Feedback-Loop Stabilization 21 2.3 Paper Survey 25 2.3.1 Current Mode Control 25 2.3.2 Current-Pump Technique 27 2.3.3 Dual Mode Control 29 Chapter 3 Proposed Architecture 32 3.1 Introduction 32 3.2 Specification of DC-DC Buck Converter 32 3.3 System Architecture 33 3.4 Hysteresis Prediction Voltage Control (HPVC) 34 3.4.1 Early Turn-off/Turn-on to Reduce Ringing Phenomenon 34 3.4.2 Early Triggering to Reduce Overshoot/Undershoot 38 3.4.3 Operational Waveforms with The Proposed HPVC Technique 41 Chapter 4 Circuit Implementation and Simulation Results 43 4.1 Error Amplifier Circuit 44 4.1.1 Operational Amplifier 45 4.1.2 Two-Stage Error Amplifier 48 4.2 Comparator Circuit 51 4.3 Ramp Generator Circuit 54 4.4 Prediction Circuit 56 4.4.1 Differentiator 57 4.4.2 Squarer 58 4.5 HPVC Controller 60 4.6 Subtractor 62 4.7 One-Shot Circuit 63 4.8 Gate Driver with Dead Time Control 64 4.9 Simulation Results 67 4.9.1 The Transient Waveforms of HPVC Mode Control 69 4.9.2 Transient Response 70 4.9.2.1 Conventional Dominant-Pole Compensated PWM 70 4.9.2.2 Two-Stage EA compensated PWM 74 4.9.2.3 Proposed HPVC Technique 77 4.9.2.4 Summary Table 81 4.9.3 Efficiency 81 4.10 Performance Summary in simulation 83 Chapter 5 Experiment Results 84 5.1 Measurement Setup 84 5.2 Measurement Results 90 5.2.1 The Output Voltage in Steady State 90 5.2.2 Transient response 90 5.2.3 Load/Line Regulation 94 5.2.4 Efficiency 95 5.2.5 Performance Summary 97 5.3 Discussion of Spike Noise 98 Chapter 6 Conclusion and Future Work 106 6.1 Conclusion 106 6.2 Future Work 106 Bibliography 107 | |
dc.language.iso | en | |
dc.title | 一個採用預測電壓遲滯控制技術來達到快速暫態響應之直流降壓式轉換器 | zh_TW |
dc.title | A Hysteresis Prediction Voltage Control Technique for Fast Transient Response in DC-DC Converters | en |
dc.type | Thesis | |
dc.date.schoolyear | 101-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 陳怡然(Yi-Jan Emery Chen),劉邦榮(Pang-Jung Liu) | |
dc.subject.keyword | 直流轉換器,快速暫態響應,遲滯控制, | zh_TW |
dc.subject.keyword | DC-DC Converter,Fast Transient Response: Hysteresis Control, | en |
dc.relation.page | 109 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2013-08-20 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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