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標題: | 在全速掃描測試中測試資料容積以及能量管理 Test Data Volume and Power Management for Scan-Based At-Speed Testing |
作者: | Yi-Tsung Lin 林易增 |
指導教授: | 黃俊郎 |
關鍵字: | 全掃描,全速測試,測試資料壓縮,霍夫曼碼,降低掃描練移動功率,降低掃描練擷取功率, full scan,at-speed testing,test data compression,Huffman encoding,shift power reduction,capture power reduction, |
出版年 : | 2017 |
學位: | 碩士 |
摘要: | 近年來隨著製程的進步以及晶片密度變高,功率消耗已經成為重要的問題;尤其是在晶片測試方面,在測試模式下為了提高錯誤涵蓋, 因此會盡量同時測試多個錯誤, 造成測試模式下功率消耗遠大於操作模式。這將會造成一些損害,如:晶片受損、壓降造成的良率下降。而在以往的全速全掃描練測試(At-speed full scan testing)中,有可能有測試向量變多、產生測試向量時間的過長、過高的掃描練移動功率(scan chain shift power)問題。
在論文中,提出了(1)第一個在霍夫曼編碼測試環境下的低功率測試技術,以不失真測試資料壓縮技術並減少測試資料量和掃描練擷取功率、以及(2)加入阻斷元件的掃描正反器設計以減少掃描練移動功率和掃描練擷取功率,此設計可以在移動週期(shift cycles)完全阻隔變換行動(switching activities),且可以降低擷取功率(capture power)。 In modern complex low-power designs, due to the progression of manufacture process and higher transistor density in a chip, power consumption has become a serious problem. Especially in test power consumption, to increase the fault coverage, we may test as more as possible faults in each test pattern, and this results in more test power consumption. More test power consumption may cause the chip to be damaged or yield loss due to excessive IR-drop. Traditional at-speed full scan testing may face more test pattern count, more test pattern generation time, and excessive shift power problems. This thesis proposed: (1) A test data compression technique to decrease the capture power consumption and control the test data volume, which is the first low test power work in Huffman test data compression environment. (2) A transition-isolation scan-cell design to decrease the shift and capture power consumption, which can isolate all switching activities during shift cycles and reduce capture power during capture cycles. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/59931 |
DOI: | 10.6342/NTU201700221 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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ntu-106-1.pdf 目前未授權公開取用 | 1.34 MB | Adobe PDF |
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