二氧化鉿薄膜成長於矽鍺磊晶層上的介面熱行為

Abstract

近年來，由於互補式金屬氧化物半導體(CMOS)的尺寸快速縮小，傳統絕緣層材料二氧化矽因物理上的極限，造成漏電流過高而影響原件特性。因此，高介電質材料二氧化鉿被廣泛的研究並應用以取代二氧化矽，有助於半導體元件的持續微縮。此外，為了提高元件的工作速度，以擁有更高載子遷移率的應變矽鍺作為CMOS傳輸通道是一個較佳的選擇。但新的材料也因介面組成和應變效應產生新的問題。 在本研究中，我們以原子層沉積技術將二氧化鉿氧化層的厚度縮小至低於二奈米，成長於矽鍺磊晶基板與矽基板上。以這兩種結構進行光學與電學的量測，用以分析二氧化蛤與基板介面的特性。在以第一原理為模型的計算中，因晶格不匹配與介面張力造成的結果包含:在熱處理過程中鍺原子會向下遷移與介面存在低化學劑量的氧化矽，這些結論都在光學量測中被證實。 其次，針對二氧化鉿/矽鍺基板與二氧化鉿/矽基板實行的高頻電容-電壓量測，其結果分析出兩種結構在等效介電質常數、平帶電壓偏移與介面陷阱密度有明顯差異，這些差異能歸因於鍺氧化物的存在與矽擴散等效應。最後在電流-電壓的量測中，提供了兩種樣品的漏電流程度，其曲線可以由能帶結構的變異來解釋。

In the recent year, hafnium dioxide (HfO2) has been investigating and applying on gate dielectric of CMOS devices to improve the scaling difficult for SiO2. To develop the higher speed application, strained SiGe is the suggested channel material due to its high carrier mobility as compare with Si-substrate. In this work, we demonstrated the optical and electronic measurements on HfO2 film reached 1.4 nm grown by ALD on the SiGe on Si and Si substrate, to determine the interfacial characteristics. The properties at interface layer of HfO2/SiGe have been calculated by our theoretical model used first-principles. Lattice mismatch causes tensile stress result in Ge migration during thermal treatment and existence of substoichimetric SiOx are predicted and verified in optical measurement. On the other hand, C-V and I-V measurements detect the electronic qualities for HfO2/SiGe on Si and HfO2/Si MOS capacitors, includes the effective dielectric constant (keff), flat band voltage shift (ΔVFB), density of interface trap (Dit), and the leakage current density. These differences could attribute to the existence of Ge oxide, Si diffusion, and band structure variation.