請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/57444完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 吳宗霖(Tzong-Lin Wu) | |
| dc.contributor.author | Sheng-Yun Hsu | en |
| dc.contributor.author | 徐聖昀 | zh_TW |
| dc.date.accessioned | 2021-06-16T06:46:21Z | - |
| dc.date.available | 2017-08-13 | |
| dc.date.copyright | 2014-08-13 | |
| dc.date.issued | 2014 | |
| dc.date.submitted | 2014-07-25 | |
| dc.identifier.citation | [1] T.L. Wu, F. Buesink, and F. Canavero, “Overview of Signal Integrity and EMC Design Technologies on PCB: Fundamentals and Latest Progress” in Electromag. Compat., IEEE Trans. on, vol 55, pp. 624-638, Aug , 2013
[2] K. Iokibe, Y. Yano, and Y. Toyota, “Insertion of parallel RL circuits into power distribution network for simultaneous switching current reduction and power integrity,” in Proc. IEEE Asia-Pacific Internation Symposium on Electromagnetic Compatibility, Sentosa, Singapore, May 2012, pp. 417-420 [3] B. K. Casper , M. Haycock and R. Mooney “An accurate and efficient analysis method for multi-Gb/s chip-to-chip signaling schemes”, Proc. Symp.VLSI Circuits Dig. Tech. Papers, pp.54 -57, 2002 [4] B. Analui, J. Buckwalter, and A. Hajimiri, “Data-dependent jitter in serial communications,” IEEE Trans. Microwave Theory Tech., Vol. 53, No. 11, pp. 1841-1844, Nov. 2005. [5] Rui Shi; Wenjian Yu; Yi Zhu; Chung-Kuan Cheng; Kuh, E.S. 'Efficient and accurate eye diagram prediction for high speed signaling', Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on, On page(s): 655 – 661 [6] Y. C. Lai , R.B. Wu , “Fast Eye Diagram Algorithm and FIR Compensation Design for General Transmission Line Systems”, Master thesis , National Taiwan University , Jan. 2010. [7] H. Zhu, C.K. Cheng, A. Deutsch, and G. Katopis, 'Predicting and optimizing jitter and eye-opening based on bitonic step response,' in Proc. IEEE EPEP'2007, pp. 155-158, Oct. 2007. [8] V. Stojanovic and M. Horowitz, “Modeling and analysis of highspeed links,” in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2003, pp. 589–594. [9] Sanders, M. Resso, and J. D’Ambrosia, “Channel compliance testing utilizing novel statistical eye methodology,” presented at the DesignCon, Santa Clara, CA, USA, Feb. 2004. [10] C.C. Chou, H.H. Chuang, T.L. Wu, S.H. Weng, C.K. Cheng “Eye prediction of digital driver with power distribution network noise” IEEE EPEPS, pp.131-134, OCT 21-24, 2012 [11] J. Ren and D. Oh, “Multiple edge responses for fast and accurate system simulations,” in Adv. Packag., IEEE Trans. on, vol. 31, no. 4, pp. 741-748, Nov. 2008. [12] B. Casper , G. Balamurugan , J. E. Jaussi , J. Kennedy and M. Mansuri 'Future microprocessor interfaces:Analysis, design and optimization', Proc. IEEE Custom Integr. CircuitsConf., pp.479 -486 2007 [13] Cristofoli, P. Palestri, N. Da Dalt , L. Selmi ' Efficient Statistical Simulation of Intersymbol Interference and Jitter in High-Speed Serial Interfaces', Components, Packaging and Manufacturing Technology, IEEE Transactions on, vol. 4, pp. 641 –647, april 2014. [14] G. Balamurugan et al., “Modeling and Analysis of High-Speed I/O Links,” IEEE Transactions on Advanced Packaging, vol. 32, no. 2, pp. 237-247, May 2009. [15] K. S. Oh, F. Lambrecht, S. Chang, Q. Lin, J. Ren, C. Yuan, J. Zerbe, and V. Stojanovic, “Accurate system voltage and timing margin simulation in high-speed I/O system designs,” IEEE Trans. Adv. Packag., vol. 31, no. 4, pp. 722–730, Nov. 2008. [16] D. Oh, J. Ren, and S. Chang, “Hybrid statistical link simulation techinique”, in Compon. Packag. Manuf. Technol. IEEE Trans. on, vol. 1, no. 5, pp. 772-783, May. 2011. [17] D. Oh, S. Chang, R. Jihong, Y. Ling, L. Hai, C. Madden, and R. Schmitt “Statistical link analysis and in-situ characterization of high-speed memory bus in 3-D package systems,” in Proc. IEEE Int. Symp. Electromagn.Compat.,Aug.2011,pp.797–802. [18] Z. Chen, Becker, W.D., Katopis, G. “A new approach to deriving packaging system statistical eye diagram based on parallel non-linear transient simulations using multiple short signal bit patterns,” Electronic Components and Technology Conference (ECTC), pp. 160-167, May 29 - June 1, 2012, San Diego, USA [19] WIKIPEDIA The Free Encyclopedia, ‘intersymbol Interference,’: http://en.wikipedia.org/wiki/Intersymbol_interference | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/57444 | - |
| dc.description.abstract | 隨著電路的傳輸速度越來越快，訊號完整度與電磁相容開始慢慢的被大家重視，而在電路設計中，眼圖是一個判斷數位訊號品質的一個重要依據，而傳統我們利用隨機二元序列(PRBS)來得到眼圖，而此過程可能會浪費相當多的模擬時間，少則是幾個小時，多時則達一天。而使用預測眼圖演算法是一個常見的方法來說縮短模擬時間，而眼圖預測分為兩大類：第一類為PDA(Peak Distortion Analysis)利用輸入簡單的脈衝響應或是步階響應來預測眼圖的最壞內邊界，而此方法只能預測出眼圖的內邊界形狀並無法得知其他眼圖的相關資訊，如：位元錯誤率(Bit error Rate)、眼圖的機率密度函數(Probability density function)也無法得知，也無法將隨機電壓抖動加入預測眼圖模擬當中。
為了解決上述PDA無法完成的部分，第二類為眼圖的統計分析，有一個前提假設在這個分析當中，也就是系統中傳輸0與傳輸１有著相同的機率也就是50%。 還在以前的研究當中，無法做很精準預測因為系統中有著非線性的效應在其中，所以本篇將提供一個全新的預測眼圖演算法，利用不同數目的步階響應，進而預測出位元錯誤率、眼圖的機率密度函數，此演算法分為不同階次，如果利用一個上升步階響應與一個下降步階響應來計算我們稱為第一級，但是為了增加精準度，我們會用兩個上升步階響應與兩個下降步階響應來計算我們稱為第二級，以此類推，當然越多級所耗費的模擬時間將會更長，這裡必須以精準度與模擬時間做一個取捨。此研究在非線性電路中也有其準確性，無論是模擬或是實驗上都有相當好的結果，結果將在本論文的第四章與第五章呈現，另外此研究也大幅縮減了模擬的時間，此演算法僅需不到一分鐘的時間就能預測出與PRBS差不多的結果。 | zh_TW |
| dc.description.abstract | Signal integrity issue has become more and more important in recent years. Eye diagram is a method of testifying the signal quality. PRBS is the conventional method of obtaining eye diagram, but it takes lots of time in simulation .It maybe will take a couple of hours. Eye prediction is a common solution for saving simulation time. There are two kinds of eye prediction: The first one is PDA(Peak Distortion Analysis), the pulse response and step response is used to predict the inner boundary of eye diagram, but it cannot be reveal the information of PDF(Probability Density Function) and BER(Bit Error Rate). Furthermore, we cannot consider the random jitter effect in PDA.
In order to remedy the PDA, the statistical analysis is to solve the difficulty. There is an assumption in this kind of prediction. The transmission ‘1’ and transmission ‘0’ have the same probability, both 50%. In the previous studies, the prediction might be inaccurate in the non-linear system. In this paper we propose a new algorithm for solving the non-linear effects by using rising and falling responses. The new proposed method is used in both simulation and experiment, and they both show accurate results. The proposed method takes less than 1 minute in simulation. From these results, we could get a deep understanding of these algorithms. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-16T06:46:21Z (GMT). No. of bitstreams: 1 ntu-103-R01942013-1.pdf: 2368559 bytes, checksum: 756e5194297951ff1690c2a3014ad8ee (MD5) Previous issue date: 2014 | en |
| dc.description.tableofcontents | 誌謝 i
中文摘要 iii ABSTRACT v CONTENTS vi LIST OF FIGURES viii LIST OF TABLES xi Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Literature Survey 2 1.3 Contributions 5 1.4 Organization of this thesis 5 Chapter 2 Mathematical Background of Analytic Methods 7 2.1 Introduction of Eye diagram 7 2.2 Superposition Analysis 9 2.2.1 Superposition Equation 10 2.3 Statistical Analysis 13 2.3.1 A Simple Example for SBR 14 Chapter 3 Proposed Algorithms in Statistical Analysis 21 3.1 Order 1 of PDF 25 3.2 Order 2 or Higher Orders of PDF 29 3.3 Using PDF to evaluate Bit Error Rate 35 3.3.1 Merged PDF method 35 3.3.2 Cumulative distribution function(CDF) 38 Chapter 4 Simulation Results 41 4.1 Push-pull driver 41 4.2 Open drain driver 46 4.3 Summary 53 Chapter 5 Experiment Design and Results 55 5.1 Circuit of the experiment 55 5.2 Experiment results 58 5.3 Summary 60 Chapter 6 Conclusion 61 REFERENCE 63 | |
| dc.language.iso | en | |
| dc.subject | 眼圖 | zh_TW |
| dc.subject | 位元錯誤率 | zh_TW |
| dc.subject | 訊號完整度 | zh_TW |
| dc.subject | 機率密度函數 | zh_TW |
| dc.subject | 非線性驅動器 | zh_TW |
| dc.subject | signal integrity | en |
| dc.subject | channel evaluation | en |
| dc.subject | eye diagram | en |
| dc.subject | non-linear driver | en |
| dc.subject | probability density function | en |
| dc.subject | bit error rate | en |
| dc.title | 在非線性電路中快速預測位元錯誤率 | zh_TW |
| dc.title | A Novel Algorithm for Fast Bit Error Rate Prediction in Non-linear Circuits | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 102-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 盧信嘉(Hsin-Chia Lu),邱奕鵬(Yih-Peng Chiou),林丁丙(Ding-Bing Lin) | |
| dc.subject.keyword | 位元錯誤率,眼圖,非線性驅動器,機率密度函數,訊號完整度, | zh_TW |
| dc.subject.keyword | bit error rate,channel evaluation,eye diagram,non-linear driver,probability density function,signal integrity, | en |
| dc.relation.page | 65 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2014-07-28 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
文件中的檔案：
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-103-1.pdf 未授權公開取用 | 2.31 MB | Adobe PDF |
系統中的文件，除了特別指名其著作權條款之外，均受到著作權保護，並且保留所有的權利。