請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/55360
完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 林宗賢(Tsung-Hsien Lin) | |
dc.contributor.author | Feng-Wen Lee | en |
dc.contributor.author | 李峯文 | zh_TW |
dc.date.accessioned | 2021-06-16T03:58:25Z | - |
dc.date.available | 2015-02-04 | |
dc.date.copyright | 2015-02-04 | |
dc.date.issued | 2014 | |
dc.date.submitted | 2014-11-28 | |
dc.identifier.citation | [1] R. F. Yazicioglu, C. Van Hoof, and R. Puers, Biopotential Readout Circuits for Portable Acquisition Systems, Springer, 2009.
[2] X. Zou, W. Liew, L. Yao, and Y. Lian, “A 1V 22μW 32-Channel Implantable EEG Recording IC,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp.126–128, Feb 2010. [3] R.F. Yazicioglu, P. Merken, and C. Van Hoof, “A 200μW Eight-Channel EEG Acquisition ASIC for Ambulatory EEG Systems,” IEEE J. Solid-State Circuits, vol.43, no.12, pp. 3025 - 3038, Dec. 2008. [4] J. Xu, R. F. Yazicioglu, P. Harpe, and K.A.A. Makinwa, “A 160μW 8-Channel Active Electrode System for EEG Monitoring,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 300 – 302, Feb 2011. [5] V. Majidzadeh, A. Schmid, and Y. Leblebici, “Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor,” IEEE Trans. Bio. Circuits Syst., vol. 5, no. 3, pp. 262–271, Jun. 2011. [6] A. M. Morega, A. A. Dobre, and M. Morega, “Numerical simulation in electrical cardiometry,” in IEEE Opt. Electrical and Electronic Equipment Dig. Tech. Papers, pp. 1407–1412, Aug. 2009. [7] D. P. Bernstein, “Impedance cardiography : Pulsatile blood flow and the biophysical and electrodynamic basis for the stroke volume equations,” in J. Electrical Bioimpedance, vol, 1, pp. 2–17, Dec. 2009. [8] J. H. Meijer, A. Smorenberg, and A. B. J. Groeneveld, “Assessing cardiac preload by the Initial Systolic Time Interval Obtained from impedance cardiography,” in J. Electrical Bioimpedance, vol, 1, pp. 80–8., Dec. 2010. [9] Z. Xiao, C. Tang, and R. Bashirullah, “A 190μW-915MHz active neural transponder with 4-channel time multiplexed AFE,” in Proc. IEEE Symp. VLSI Circuits Dig. Tech. Papers, pp. 58–59, Jun. 2009. [10] R. R. Harrison and C. Charles, “A Low-Power Low-Noise CMOS Amplifier for Neural Recording Applications,” IEEE J. Solid-State Circuits, vol. 38, no. 6, pp. 958-965, Jun. 2006. [11] J. Xu, R. F. Yazicioglu, K.A.A. Makinwa and C. Van Hoof, “A 160μW 8-Channel Active Electrode System for EEG Monitoring,” IEEE Trans. Bio. Circuits Syst., vol. 5, no. 6, pp. 555–567, Dec. 2011. [12] J. H. Fischer, “Noise Sources and Calculation Techniques for Switched Capacitor Filters,” IEEE J. Solid-State Circuits, vol. 17, no. 4, pp. 742-752, Aug. 1982. [13] B. Razavi, Design of Analog CMOS Integrated Circuits, McHrawHill, 2001. [14] Q. Fan, F. Sebastiano, J. H. Huijsing, and K. A. A. Makinwa 'A 1.8μW 60nV/√Hz Capacitively-Coupled Chopper Instrumentation Amplifier in 65 nm CMOS for Wireless Sensor Nodes,' IEEE J. Solid-State Circuits, vol. 46, no. 7, pp. 1534-1543, July 2011 [15] F. Sebastiano, F. Butti, R. v. Veldhoven, and P. Bruschi, 'A 0.07mm2 2-Channel Instrumentation Amplifier with 0.1% Gain Matching in 0.16μm CMOS,' in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 294-295, Feb. 2014 [16] B. Johnson and A. Molnar, 'An Orthogonal Current-Reuse Amplifier for Multi-Channel Sensing,' IEEE J. Solid-State Circuits, vol. 48, no. 6, pp.1487-1496, June 2013 [17] W. M. Chen, W. C. Yang, and C. Y. Wu, “The Design of CMOS General-Purpose Analog Front-End Circuit with Tunable Gain and Bandwidth for Biopotential Signal Recording System,” IEEE EMBS. Dig. Tech. Papers, pp. 4784-4787, Sep. 2011. [18] Y. Tseng, Y. C. Ho, S. T. Kao, and C. C. Su, “A 0.09μW Low Power Front-End Biopotential Amplifier for Biosignal Recording,” IEEE Trans. Bio. Circuits Syst., vol. 6, no. 5, pp. 508–516, Dec. 2012. [19] F. Shahrokhi, K. Abdelhalim, and R. Genov, “A 128-Channel Fully Differential Digital Integrated Neural Recording and Stimulation Interface,” IEEE Trans. Bio. Circuits Syst., vol. 4, no. 3, pp. 149–161, Dec. 2010. [20] K. A. Ng and Y. P. Xu, “A Compact Low Input Capacitance Neural Recording Amplifier,” IEEE Trans. Bio. Circuits Syst., vol. 7, no. 5, pp. 610–620, Dec. 2013. [21] L. Yan, J. Bae, and H. J. Yoo, “A 3.9mW 25-electrode reconfigured thoracic impedance/ECG SoC with body-channel transponder,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp.490 – 491, Feb. 2010 [22] W. Lee and S. Cho, “An Integrated Pulse Wave Velocity Sensor using Bio-impedance and Noise-shaped Body Channel Communication,” in Proc. IEEE Symp. VLSI Circuits Dig. Tech. Papers, pp.218 – 219, Jun. 2013 [23] R. F. Yazicioglu, S. Kim, and C. Van Hoof, “A 30μW Analog Signal Processor ASIC for Portable Biopotential Signal Monitoring,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 124-126, Feb., 2010. [24] S. Kim, L. Yan, and R. F. Yazicioglu, “A 20μW intra-cardiac signal-processing IC with 82dB bio-impedance measurement dynamic range and analog feature extraction for ventricular fibrillation detection,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 17-21, Feb. 2014. [25] M. Min and T. Parve, “Improvement of Lock-in Electrical Bio-impedance Analyzer for Implantable Medical Devices,” IEEE Trans. Inst. Meas., vol. 56, no. 3, pp. 968–974, Jun. 2007. [26] P. R. Gray and R. G. Meyer, “Recent advances in monolithic operational amplifier design,” IEEE Trans. Circuits Syst., vol. CAS-21, no. 3, pp. 317-327, May 1974 [27] H. Kanai, I. Chatterjee, and O. P. Gandhi, “Human Body Impedance for electromagnetic Hazard Analysis in the VLF to MF Band,” IEEE Trans. Microw. Theory Tech., vol. MTT-32, no. 8, pp. 763-772, Aug 1984 [28] C. D. Ezekwe, J. P. Vanderhaegen, X, Xing, and G. K. Blalachandran, “A 6.7nV/√Hz Sub-mHz-1/f-corner 14b analog-to-digital interface for rail-to-rail precision voltage sensing,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 246-247, Feb. 2011. [29] M. Yucetas, J. Salomaa, A. Kalanti, and K. Halonen, “A closed-loop SC interface for a ±1.4g accelerometer with 0.33% nonlinearity and 2μg/√Hz input noise density,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 320-321, Feb. 2010. [30] G. Singh, R. Wu, Y. Chae, and K. A. A. Makinwa, “A 20bit Continuous-Time ΣΔ Modulator with a Gm-C Integrator, 120dB CMRR and 15 ppm INL,” in Proc. A. Solid-State Circuits Conf., pp. 385-388, Feb. 2012. [31] I. Akita and M. Ishida, 'A 0.06mm2 14nV/√Hz Chopper Instrumentation Amplifier with Automatic Differential-Pair Matching,' in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 178-179, Feb. 2013. 89 | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/55360 | - |
dc.description.abstract | 生理訊號感測在醫學臨床診斷上具有重要意義。以往生理訊號的量測皆須仰賴大型機台,拜科技進步之賜,現今的半導體工業已允許我們將整個系統微小化並實作於一個電路板,甚至是單一晶片上。將整個感測系統包含前端電路,類比數位轉換器,數位訊號處理器以及無線傳輸/接收模組全部整合在一個晶片內,是近幾年國際間熱門的研究課題。本論文著重於探討應用於此系統之類比前端電路設計。此電路必須將極其微弱且低頻的生理信號放大,去除來自外界與電路本身可能的雜訊干擾,同時亦要求低功率以滿足可攜式需求。
本論文實作並量測三個不同架構的晶片。第一個架構為一個四通道儀表放大器,利用時間分工技術達到僅使用一個電容回授式儀表放大器達到可同時偵測四組不同訊號的功能,然而時間分工技術雖然可以大幅降低晶片面積及功率消耗,但其非連續時間的特性會將儀表放大器的輸出雜訊疊回低頻,導致訊號品質下降。此架構採用台積電0.18微米製程,每個通道面積消耗為0.015平方毫米,在1.8伏特的電源供應下,每個通道平均消耗4.25微安培的電流,並達到11.56的雜訊效率指標(NEF) 。 第二個架構實現一個雙通道儀表放大器利用正交頻率調變技巧。此電路會先將訊號做正交調變,以利於訊號在進行放大過程不會互相干擾,並且在解調後可成功將訊號分離。正交頻率調變技巧為連續時間操作,所以不會發生雜訊疊回低頻的現象,且此技巧可將閃爍雜訊載到高頻上,在利用低通濾波器可有效的去除,讓載低頻的訊號有良好的訊號品質。此架構採用台積電0.35微米製程,每個通道面積消耗為0.035平方毫米,在3伏特的電源下,每個通道平均消耗13微安培的電流,並達到3.74的雜訊效率指標(NEF) 。 I 第三個架構為胸腔阻抗檢測電路,此架構可成功量測出胸腔阻抗訊號,並且採用方波刺激電流有別於傳統的刺激方法,方波刺激電流可大大降低整體電路的功率消耗,此架構還提出新的解調方法讓解調出的胸腔阻抗訊號有良好的線性度及精準度。此架構採用台積電0.18微米製程,面積消耗為0.5平方毫米,在1.8伏特的電源下最大電流消耗為75微安培,刺激電流大小為10到50微安培之間。 | zh_TW |
dc.description.abstract | The thesis presents the design of analog front-end circuits for biomedical applications. The analog-front-end circuit is the most critical building block in bio-potential monitoring SoC, since it should amplify very weak signals under noisy aggressors.
Three circuit architectures are implemented and in this thesis. The first chip proposes a 4-channel low noise amplifier that utilizes a time-multiplexing topology to share a single primary LNA with four independent input channels. So adopting this technique can save large area and large power consumption. However, the characteristic of time-multiplexing technique is not continuous of each channel and it will fold the output noise of LNA back to low frequency. So the noise folding problem will make signal quality degrade. This chip occupies 0.015 mm2 and consumes 4.25 μA per channel. The NEF is 11.56 due to the noise folding problem. It is implemented with TSMC 0.18 μm process. The second chip demonstrates a LNA that adopts an orthogonal frequency chopping (OFC) technique to realize a continuous 2-channel LNA with only one active amplifier. The OFC technique modulates two input signals to be orthogonal to each other before feeding into LNA. After two signals are amplified by LNA, the two signals can be demodulated back easily. Due to the OFC technique, the flicker noise will be modulated to high frequency. The signal quality of this chip is better than chip 1. This chip occupies 0.035 mm2 and consumes 13 μA per channel. The NEF is 3.74. It is implemented with TSMC 0.35 μm process. III The third chip implements a thoracic electrical bio-impedance(TEB) readout system. It uses square-wave current as injection current. The square-wave current can save large power and have good linearity rather traditional way. The proposed demodulated way can achieve high linearity and good accuracy. This chip occupies 0.5 mm2 and consumes 75 μA. The injection current range is from 10 μA to 50 μA. It is implemented with TSMC 0.18 μm process. | en |
dc.description.provenance | Made available in DSpace on 2021-06-16T03:58:25Z (GMT). No. of bitstreams: 1 ntu-103-R01943156-1.pdf: 2736102 bytes, checksum: ecc17f7d9715d29344d96c665fe753f0 (MD5) Previous issue date: 2014 | en |
dc.description.tableofcontents | Chapter 1 Introduction........................................................................................... 1
1.1 Background..................................................................................................... 1 1.2 Thesis Overview............................................................................................. 3 Chapter 2 A 4-channel Low Noise Amplifier Utilizing Time Multiplexing Technique ........................................................................................................................ 5 2.1 Introduction .................................................................................................... 5 2.2 Prior Art Preview............................................................................................ 5 2.3 System Overview............................................................................................ 6 2.3.1 Signal Transfer Function ......................................................................... 7 2.3.2 Noise Analysis......................................................................................... 9 2.3.3 Crosstalk Analysis ................................................................................. 13 2.4 OPAMP Design ............................................................................................ 15 2.4.1 Noise Response...................................................................................... 17 2.5 System Level Simulation.............................................................................. 18 2.5.1 Signal Transfer Function ....................................................................... 18 2.5.2 Noise Response...................................................................................... 19 2.5.3 Crosstalk ................................................................................................ 20 V 2.6 Measurement Results.................................................................................... 21 2.6.1 Chip Configuration................................................................................ 21 2.6.2 AC Response ......................................................................................... 22 2.6.3 Noise Response...................................................................................... 25 2.6.4 Crosstalk Measurement ......................................................................... 26 2.6.5 Time-Domain ECG Measurement......................................................... 28 2.7 Summary....................................................................................................... 29 Chapter 3 A 2-channel Capacitively-Coupled IA with an Orthogonal Chopping Technique ...................................................................................................................... 33 3.1 Introduction .................................................................................................. 33 3.2 System Overview.......................................................................................... 34 3.2.1 Signal Transfer Function ....................................................................... 34 3.2.2 Crosstalk Analysis ................................................................................. 39 3.3 OPAMP Design ............................................................................................ 42 3.4 System Level Simulation Results................................................................. 44 3.4.1 Noise Response...................................................................................... 45 3.4.2 Crosstalk ................................................................................................ 46 3.5 Measurement Results.................................................................................... 47 3.6 Summary....................................................................................................... 55 VI Chapter 4 A Thoracic Electrical Bio-impedance (TEB) Readout System....... 59 4.1 Introduction .................................................................................................. 59 4.2 System Overview.......................................................................................... 60 4.3 System Blocks Design.................................................................................. 65 4.3.1 LNA....................................................................................................... 65 4.3.2 Demodulator .......................................................................................... 67 4.4 System Blocks Simulation Results............................................................... 68 4.4.1 Constant Current Generator................................................................... 68 4.4.2 LNA and OPAMP ................................................................................. 71 4.4.3 Demodulator .......................................................................................... 73 4.5 Measurement Results.................................................................................... 76 4.5.1 Chip Configuration................................................................................ 76 4.5.2 DC and Dynamic Resistance Measurement .......................................... 76 4.5.3 Noise Measurement ............................................................................... 77 4.5.4 TEB and ECG measurement.................................................................. 78 4.6 Summary....................................................................................................... 79 Chapter 5 Future Work ........................................................................................ 83 5.1 Future Work.................................................................................................. 83 References ............................................................................................................. 85 | |
dc.language.iso | en | |
dc.title | 生醫訊號感測系統之低雜訊低功耗類比前端電路設計 | zh_TW |
dc.title | Low-noise and Low-power Readout Circuits for Biomedical Applications | en |
dc.type | Thesis | |
dc.date.schoolyear | 103-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 李泰成(Tai-Cheng Lee),黃柏鈞(Po-Chiun Huang),彭盛裕(Sheng-Yu Peng),林永裕(Yong-Yu Lin) | |
dc.subject.keyword | 低功率,低雜訊,感測器,類比前端電路,儀表放大器,胸腔阻抗, | zh_TW |
dc.subject.keyword | Low Power,Low Noise,Sensor,Analog Front-End Circuits,Instrumentation Amplifier,Biomedical Applications,TEB, | en |
dc.relation.page | 89 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2014-11-28 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-103-1.pdf 目前未授權公開取用 | 2.67 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。