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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/53028完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 王暉 | |
| dc.contributor.author | Bo-Yu Chen | en |
| dc.contributor.author | 陳柏羽 | zh_TW |
| dc.date.accessioned | 2021-06-15T16:40:04Z | - |
| dc.date.available | 2020-08-16 | |
| dc.date.copyright | 2015-08-16 | |
| dc.date.issued | 2015 | |
| dc.date.submitted | 2015-08-11 | |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/53028 | - |
| dc.description.abstract | 這本論文中包含了三個部分，第一個部分是用於天文應用的K 頻段pHEMT
製程高增益低雜訊放大器，模擬結果顯示這個低雜訊放大器在18.5 GHz 到30GHz 的頻率範圍間擁有29 dB 的小訊號增益，在K 頻段內的平均雜訊指數是2.1dB。整體的晶片尺寸是2 平方毫米，直流消耗是27 毫瓦，而這個直流消耗滿足於未來可能的低溫操作。 第二部分是一個CMOS 90 奈米製程具有諧波抑制功能的寬頻二倍頻器，這個倍頻器採用平衡式疊接架構，而這個結構擁有良好的奇倍頻抑制效果，而四倍頻以及更高項次的偶次諧波則由一個橢圓低通濾波器濾除。在5 dBm 的輸入功率下，這個倍頻器的在42 到90 GHz 的轉換增益為 -8 到 -11 dB，而基頻抑制則大於20 dBc，四倍頻抑制則大於18 dBc，整體的直流功耗為20 毫瓦，總面積為0.33 平方毫米。 最後是一個使用CMOS 90 奈米製程的Ka 頻段相移器以及一個可調增益放 大器。相移器採用開關式相移器的架構，這種架構能夠減輕系統的控制電路設計難度，並且節省直流功耗。在相位陣列系統中，相移器負責控制天線的輸入訊號相位，而可調增益大器則是用來彌補相移器在不同操作模式時不同的輸入損耗。量測結果顯示這個初始設計的相移器之輸入損號為9 dB 至13 dB；但相位誤差大於11.25°，不符合設計規格，因此在討論章節中記錄了兩個重新設計之相移器的模擬與量測結果。可調增益大器的最大增益為19 dB，並擁有6 dB 的增益調整範圍，可以達到彌補相移器輸入損耗差異的功能。 | zh_TW |
| dc.description.abstract | This thesis contains three parts. The first part is a K-band high gain low noise amplifier in WIN 0.1-μm process for radio astronomy application. The measurement results of the low noise amplifier show the small signal gain is 29 dB from 18.5GHz to 30 GHz and the measured average noise figure is 2.1 dB around K-band. The total dc
consumption is 27 mW and this satisfies the dc power limitation of cryogenic operation in the future. The second part of the thesis is a broadband frequency doubler with harmonic suppression technique in 90 nm CMOS process. The balanced cascode structure features good odd order harmonic suppression, and the fourth and higher order even harmonic is suppressed by an elliptic low-pass filter. The measured conversion loss of this frequency doubler is 8 to 11 dB from 42 to 90 GHz at 5-dBm input drive. The fundamental rejection ratio is better than 20 dBc and the fourth order harmonic rejection is better than 18 dBc. The total dc power is 20 mW, and total chip area is 0.33 mm2. The third part is a Ka-band phase shifter and variable gain amplifier. The phase shifter is a switch type phase shifter which can save dc power and relief the control circuit in phase array system. The phase shifter controls the input signal phase of theantenna, and variable gain amplifier is used to compensate the loss difference of different phase shifter operation state. The measured insertion loss of the initial design of the phase shifter is 9 lowest to 13 dB but the phase error is larger than 11.25°. Therefore two redesigned phase shifter are simulated and measured and presented in discussion. The variable gain amplifier shows peak gain of 19 dB with 6-dB gain tuning range and this can cover the phase shifter loss difference of different phase state. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T16:40:04Z (GMT). No. of bitstreams: 1 ntu-104-R02942021-1.pdf: 12078332 bytes, checksum: 68495d00aa46a2ca8e6048a64b31532a (MD5) Previous issue date: 2015 | en |
| dc.description.tableofcontents | 誌謝................................................... i
中文摘要...............................................iii ABSTRACT ............................................ iv CONTENTS.............................................. v LIST OF FIGURES...................................... vii LIST OF TABLES ...................................... xix Chapter 1 Introduction........................................... 1 1.1 Motivation ........................................ 1 1.2 Literature Survey................................................. 2 1.2.1 Low noise amplifier.............................. 2 1.2.2 Frequency doubler................................ 4 1.2.3 Switch type phase shifter and variable gain amplifier ....... 5 1.3 Contributions........................ 6 1.4 Thesis Organization........................................... 7 Chapter 2 Design a High Gain K-band LNA in GaAs 0.1-μm pHEMT for Radio Astronomy Application................ 9 2.1 Design procedure of the K-band LNA ............. 9 2.1.1 Device Selection ................................ 9 2.1.2 Device Modeling ............................ 17 2.1.3 Circuit Design and Simulation Results .......... 24 2.2 Measurement Results ............................ 29 2.3 Summary ......................... 31 Chapter 3 Design a Broadband Frequency Doubler in CMOS 90nm process............34 3.1 Design procedure of the broadband frequency doubler .............. 34 3.1.1 Circuit Design ............................. 34 3.1.2 Simulation Results ............................ 43 3.2 Measurement Results ........................ 47 3.3 Summary ....................................... 52 Chapter 4 Design a Ka-band 4-bit Switch Type Phase Shifter and Variable Gain Amplifier 54 4.1 Switch Type Phase Shifter ....................... 55 4.1.1 Circuit design ................... 55 4.1.2 Simulation Result of the Switch Type Phase Shifter ....... 62 4.1.3 Measurement Result of the Switch Type Phase Shifter ... 66 4.1.4 Discussion and Redesign ................... 71 4.2 Variable Gain Amplifier ....................... 108 4.2.1 Circuit design ............................... 108 4.2.2 Simulation Result of the Variable Gain Amplifier ......... 110 4.2.3 Measurement Result of the Variable gain Amplifier ...... 113 4.2.4 VGA cascade with phase shifter ....... 118 4.3 Summary ............... 119 Chapter 5 Conclusion ................... 120 Reference ........ 121 Appendix ....................... 126 | |
| dc.language.iso | en | |
| dc.subject | 單晶微波積體電路 | zh_TW |
| dc.subject | 砷化鎵 | zh_TW |
| dc.subject | 互補式金屬氧化物半導體 | zh_TW |
| dc.subject | MMIC | en |
| dc.subject | GaAs | en |
| dc.subject | CNOS | en |
| dc.title | 微波砷化鎵低雜訊放大器與高速無線通訊系統之矽基元件研製 | zh_TW |
| dc.title | Design of Microwave GaAs Low Noise Amplifier and Silicon-based Components for High Speed Wireless Communication Systems | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 103-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 林坤佑,章朝盛,蔡作敏,黃天偉 | |
| dc.subject.keyword | 單晶微波積體電路,砷化鎵,互補式金屬氧化物半導體, | zh_TW |
| dc.subject.keyword | MMIC,GaAs,CNOS, | en |
| dc.relation.page | 130 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2015-08-11 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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