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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48041完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 莊晴光(Ching-Kuang C. Tzuang) | |
| dc.contributor.author | Kai-Hsiang Chang | en |
| dc.contributor.author | 張凱翔 | zh_TW |
| dc.date.accessioned | 2021-06-15T06:44:59Z | - |
| dc.date.available | 2012-07-27 | |
| dc.date.copyright | 2011-07-27 | |
| dc.date.issued | 2011 | |
| dc.date.submitted | 2011-06-28 | |
| dc.identifier.citation | [1] W. Doherty, “A new high efficiency power amplifier for modulated waves,”
Proceedings of IRE, vol. 24, pp. 1163-1182, September 1936. [2] M. J. Chiang, H. S. Wu, and C. K. C. Tzuang, “Design of synthetic Quasi-TEM transmission line for CMOS compact integrated circuit,” IEEE Transactions on Microwave Theory and Techniques, vol. 55, no. 12, December 2007. [3] C. C. Chen and C. K. C. Tzuang, “Synthetic Quasi-TEM Meandered Transmission Lines for Compacted Microwave Integrated Circuits,” IEEE Transactions on Microwave Theory and Techniques, vol. 52, no. 6, June 2004 [4] M. J. Chiang, H. S. Wu, and C. K. C. Tzuang, “Design of CMOS Spiral Inductors for Effective Broadband Shielding,” Proceedings of the 36th European Microwave Conference, pp. 48-51, 2006. [5] Design Manual of 1P8M 0.13μm CMOS, CMSC [6] B. Wicks, E. Skafidas, and R. Evans, “A 60-GHz Fully-Integrated Doherty Power Amplifier Based on 0.13-μm CMOS process,” IEEE Radio Frequency Integrated Circuits Symposium, 2008. [7] C. P. McCarroll, G. D. Alley, S. Yates, and R. Matreci, “A 20 GHz Doherty Power Amplifier MMIC with High Efficiency and Low Distortion Designed for Broad Band Digital Communication Systems,” IEEE MTT-S International Microwave Symposium Digest, 2000. [8] J. Kang, D. Yu, K. Min, and B. Kim, “A Ultra-High PAE Doherty Amplifier Based on 0.13-μm CMOS Process,” IEEE Microwave and Wireless Components Letters, vol. 16, no. 9, September 2006. 57 [9] Y. Yang, J. Cha, B. Shin, and B. Kim, “A fully matched N-way Doherty amplifier with optimized linearity,” IEEE Transactions on Microwave Theory and Techniques, vol. 51, no. 3, pp. 986-993, March 2003. [10] David M. Pozar, Microwave Engineering, 3rd edition: Wiley [11] P. C. Ko, “Transmission Line Based CMOS Low-Power Consumption Low-Noise Amplifier and Variable Delay Line in K-Band,” National Taiwan University Master Thesis, June 2010. [12] E. J. Wilkinson, “An N-way Hybrid Power Divider,” IRE Transactions on Microwave Theory and Techniques, vol. 8, pp. 116-118, January 1960. [13] J. S. Lim, G. Y. Lee, Y. C. Jeong, D. Ahn, and K. S. Choi, “A 1:6 Unequal Wilkinson Power Divider,” Proceedings of the 36th European Microwave Conference, 2006. [14] Y. Zhao, “High Efficiency and High Linearity Doherty Amplifiers for Portable Wireless Communications,” University of California, San Diego PHD Thesis, 2006. [15] S. Wang, K. H. Tsai, K. K. Huang, S. X. Li, H. S. Wu, and C. K. C. Tzuang, “Design of X-Band RF CMOS Transceiver for FMCW Monopulse Radar,” IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 1, January 2009. [16] M. J. Chiang, H. S. Wu, and C. K. C. Tzuang, “A Ka-Band CMOS Wilkinson Power Divider Using Synthetic Quasi-TEM Transmission Lines,” IEEE Microwave and Wireless Components Letters, vol. 17, no. 12, December 2007. [17] F. H. Raab, “Efficiency of Doherty RF Power-Amplifier Systems,” IEEE Transactions on Broadcasting, vol. BC-33, no. 3, September 1987. [18] B. Kim, J. Kim, I. Kim, J. Cha, and S. Hong, “Microwave Doherty Power Amplifier for High Efficiency and Linearity,” IEEE Invited Paper, 2006. 58 [19] N. Dubuc, C. Duvanaud, and P. Bouysse, “Analysis of the Doherty Technique and Application to a 900 MHz Power Amplifier,” 2002. [20] J. Moon, Y. Y. Woo, and B. Kim, “A Highly Efficient Doherty Power Amplifier Employing Optimized Carrier Cell,” Proceedings of the 4th European Microwave Integrated Circuits Conference, 2009. [21] D. M. Upton, “A New Circuit Topology to Realize High Efficiency, High Linearity, and High Power Microwave Amplifiers,” RAWCON’98 Proceedings, 1998. [22] K. W. Kobayashi, A. K. Oki, A. Gutierrez-Aitken, P. Chin, L. Yang, E. Kaneshiro, P. C. Grossman, K. Sato, T. R. Block, H. C. Yen, and D. C. Streit, “An 18-21 GHz InP DHBT Linear Microwave Doherty Amplifier,” IEEE Radio Frequency Integrated Circuits Symposium, 2000. [23] J. H. Tsai, and T. W. Huang, “A 38-46 GHz MMIC Doherty Power Amplifier Using Post-Distortion Linearization,” IEEE Microwave and Wireless Components Letters, vol. 17, no. 5, May 2007. [24] J. Cha, J. Kim, B. Kim, J. S. Lee, and S. H. Kim, “Highly Efficient Power Amplifier for CDMA Base Stations Using Doherty Configuration,” IEEE MTT-S Digest, 2004. [25] N. Srirattana, A. Raghavan, D. Heo, P. E. Allen, and J. Laskar, “Analysis and Design of a High-Efficiency Multistage Doherty Power Amplifier for Wireless Communications,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 3, March 2005. [26] B. Kim, J. Nam, and D. Yu, “Doherty Linear Power Amplifiers for Mobile Handset Applications,” IEEE Invited Paper, 2007. [27] S. C. Cripps, RF Power Amplifiers for Wireless Communications, Norwood, MA: 59 Artech House, 1999. [28] M. Nick, and A. Mortazawi, “A Doherty Power Amplifier with Extended Resonance Power Divider for Linearity Improvement,” IEEE, 2008. [29] J. Kim, J. Cha, I. Kim, S. Y. Noh, C. S. Park, and B. Kim, “Advanced Design Methods of Doherty Amplifier for Wide Bandwidth, High Efficiency Base Station Power Amplifiers,” [30] J. Y. Lee, J. Y. Kim, J. H. Kim, K. J. Cho, and S. P. Stapleton, “A High Power Asymmetric Doherty Amplifier with Improved Linear Dynamic Range,” IEEE, 2006. [31] D. Kang, J. Choi, D. Yu, K. Min, M. Jun, D. Kim, J. Park, B. Jin, and B. Kim, “Input Power Dividing of Doherty Power Amplifiers for Handset Applications,” IEEE, 2009. [32] J. Kim, J. Cha, I. Kim, and Bumman Kim, “Optimum Operation of Asymmetrical-Cells-Based Linear Doherty Power Amplifiers – Uneven Power Drive and Power Matching,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 5, May 2005. [33] T. Tokumitsu, T. Hiraoka, H. Nakamoto, and T. Takenaka, “Multilayer MMIC using a 3μm × 3-layer dielectric film structure,” IEEE MTT-S International Microwave Symposium Digest, pp. 831-834, 1990. [34] T. Hasegawa, Y. Tarusawa, and H. Ogawa, “Uniplanar MMIC hybrids- a proposed new MMIC structure,” IEEE Transactions on Microwave Theory and Techniques, vol. MTT-35, no. 6, pp. 576-581, June 1987. [35] T. Hirota, S. Banba, and H. Ogawa, “A branch line hybrid using valley micro-strip lines,” IEEE Transactions on Microwave and Guided Wave Letters, vol. 2, no. 2, pp. 76-78, Feb. 1992. 60 [36] K. Sachse, A. Sawicki, and G. Jaworski, “Novel, multilayer coupled line structures and their circuit applications,” Microwaves, Radar and Wireless Communications. MIKON-2000. 13th International Conference on, vol. 3, pp. 131-155, 2000. [37] C. K. C. Tzuang, H. H. Wu, H. S. Wu, and J. Chen, “CMOS active band-pass filter using compacted synthetic quasi-TEM lines at C-band,” IEEE Transactions on Microwave Theory and Techniques, vol. 54, no. 12, pp. 4548-4555, December 2006. [38] H. S. Wu, H. J. Yang, C. J. Peng, and C. K. C. Tzuang, “Miniaturized microwave passive filter incorporating multilayer synthetic quasi-TEM transmission line,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 9, pp. 2713-2720, September 2005. [39] S. Wang, and C. K. C. Tzuang, “Compacted Ka-band CMOS rat-race hybrid using synthesized transmission lines,” in IEEE MTT-S International Microwave Symposium Digest, pp. 1023-1026, 2007. [40] M. Iwamoto, A. William, P. F. Chen, A. Metzger, L. Larson, and P. Asbeck, “An extended Doherty amplifier with high efficiency over a wide power range,” IEEE Transactions on Microwave Theory and Techniques, vol. 49, no. 12, pp. 2472-2479, December 2001. [41] B. Kim, Y. Yang, J. Yi, J. Nam, Y. Y. Woo, and J. H. Cha, “Efficiency Enhancement of Linear Power Amplifier Using Load Modulation Technique,” [42] C. W. Wang, H. S. Wu, and C. K. C. Tzuang, “A Miniaturized Power Combiner for Compact Design of CMOS Phase Shifter at K-Band,” IMS, 2010. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48041 | - |
| dc.description.abstract | 這篇論文是關於10 GHz 的Doherty 微波功率放大器之設計利用0.13 微米互補性金屬氧化物半導體製程，即所謂的CMOS 製程，為了改善功率放大器的線性度以及提升放大器的附加功率效率。整個架構包括主要放大器，即所謂之carrier amplifier、輔助放大器，即所謂之peaking amplifier、1:2 功率分配器、輸入與輸出匹配電路等。
除此之外，互補式金屬傳輸線技術被引進在本論文之微波功率放大器設計當中，此技術在本論文所提出之微波功率放大器的設計當中扮演了很重要的角色。特別的是，濃縮式的互補式金屬傳輸線，此為與互補式金屬傳輸線相關的設計，也會在本論文中被討論因為這類型的傳輸線可以擁有很高的特徵阻抗，以及較高的品質因素，比起傳統的互補式金屬傳輸線來說。除此之外，此種新設計更可以節省晶片面積，讓晶片面積可以更有效率的運用。 總而言之，10 GHz 之Doherty 微波功率放大器之設計議題與流程，都將會在此篇論文做介紹與討論。 | zh_TW |
| dc.description.abstract | This thesis deals with the design of 10 GHz Doherty power amplifier implemented
on 0.13μm RFCMOS for the linearity improvement and efficiency enhancement. The fully integrated design implements main amplifier, which is so-called carrier amplifier, auxiliary amplifier, which is so-called peaking amplifier, 1:2 power divider, input and output matching networks, and so forth. On top of that, the Complementary-Conducting-Strip Transmission Line is introduced in this thesis, for it plays an important part in the design of power amplifier. Especially, the latest design, Condensed Complementary-Conducting-Strip Transmission Line, which is one of the interested designs of CCS TL, is also introduced in the thesis owing to the fact that it exhibits higher characteristic impedance and higher quality factor than the conventional CCS TL designs. Furthermore, it accomplishes a great deal of size-reduction of IC-chips. To sum up, the design issues and procedures of 10 GHz Doherty power amplifier are discussed throughout this thesis. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T06:44:59Z (GMT). No. of bitstreams: 1 ntu-100-R97942136-1.pdf: 2759218 bytes, checksum: 5e25b92138c5400cb11dd903b8a9feb3 (MD5) Previous issue date: 2011 | en |
| dc.description.tableofcontents | 口試委員會審定書 ...................................................................................................... #
誌謝 ............................................................................................................................... i 中文摘要 ...................................................................................................................... ii ABSTRACT ................................................................................................................ iii CONTENTS ................................................................................................................ iv LIST OF FIGURES ..................................................................................................... vi LIST OF TABLES ..................................................................................................... viii Chapter 1 Introduction .......................................................................................... 1 1.1 Motivation .................................................................................................. 1 1.2 Organization of This Thesis ........................................................................ 3 Chapter 2 Design of Synthetic Quasi-TEM Transmission Line ........................... 5 2.1 Introduction……………………. ................................................................ 5 2.2 Complementary-Conducting-Strip Transmission Line (CCS TL) ................ 5 2.2.1 Conventional Transmission Lines in CMOS Process .......................... 5 2.2.2 Design Methodology of CCS TL ....................................................... 7 2.2.3 CCS TL Realization ......................................................................... 11 2.3 Condensed Complementary-Conducting-Strip Transmission Line (Condensed CCS TL) ................................................................................ 17 2.3.1 Design Consideration ....................................................................... 17 2.3.2 Condensed CCS TL Realization ....................................................... 19 2.4 Summary .................................................................................................. 23 Chapter 3 The 10 GHz Doherty Power Amplifier .............................................. 24 3.1 Introduction .............................................................................................. 24 3.2 Design Guideline and Proposed Circuitry ................................................. 25 3.2.1 Theory of the Doherty Power Amplifier ........................................... 25 3.2.2 Design Procedure and Consideration ............................................... 36 3.3 Proposed Circuitry of the 10 GHz Doherty Power Amplifier ..................... 40 3.3.1 Schematic ........................................................................................ 40 3.3.2 Simulation Results ........................................................................... 42 3.4 Layout of 10 GHz Doherty Power Amplifier ............................................. 45 3.5 Measurement ............................................................................................ 49 3.6 Summary .................................................................................................. 53 Chapter 4 Conclusion .......................................................................................... 55 REFERENCES ........................................................................................................... 56 | |
| dc.language.iso | en | |
| dc.subject | 附加功率效率 | zh_TW |
| dc.subject | Doherty 微波功率放大器 | zh_TW |
| dc.subject | 互補式金屬傳輸線 | zh_TW |
| dc.subject | 濃縮式的互補式金屬傳輸線 | zh_TW |
| dc.subject | 主要放大器 | zh_TW |
| dc.subject | 輔助放大器 | zh_TW |
| dc.subject | 線性度 | zh_TW |
| dc.subject | Doherty power amplifier | en |
| dc.subject | Condensed Complementary-Conducting-Strip Transmission Line | en |
| dc.subject | Complementary-Conducting-Strip Transmission Line | en |
| dc.subject | power added efficiency | en |
| dc.subject | linearity | en |
| dc.subject | or peaking amplifier | en |
| dc.subject | auxiliary | en |
| dc.subject | or carrier amplifier | en |
| dc.subject | main | en |
| dc.title | 使用互補式金屬傳輸線設計CMOS 10 GHz Doherty 微波功率
放大器之研究 | zh_TW |
| dc.title | Design of 10 GHz CMOS Doherty Power Amplifier Using
Complementary Conducting Strip Transmission Line Technology | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 99-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 許博文,吳瑞北,張志揚,林清泉 | |
| dc.subject.keyword | Doherty 微波功率放大器,互補式金屬傳輸線,濃縮式的互補式金屬傳輸線,主要放大器,輔助放大器,線性度,附加功率效率, | zh_TW |
| dc.subject.keyword | Doherty power amplifier,Complementary-Conducting-Strip Transmission Line,Condensed Complementary-Conducting-Strip Transmission Line,main, or carrier amplifier,auxiliary, or peaking amplifier,linearity,power added efficiency, | en |
| dc.relation.page | 60 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2011-06-28 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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