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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 郭宇軒(Yu-Hsuan Kuo) | |
| dc.contributor.author | Chung-Wei Lin | en |
| dc.contributor.author | 林忠偉 | zh_TW |
| dc.date.accessioned | 2021-06-15T06:44:31Z | - |
| dc.date.available | 2013-07-07 | |
| dc.date.copyright | 2011-07-07 | |
| dc.date.issued | 2011 | |
| dc.date.submitted | 2011-06-29 | |
| dc.identifier.citation | [1] International Technology Roadmap for Semiconductors (ITRS) (2010)
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Plummer, “Rapid melt growth of germanium crystals with self-aligned microcrucibles on Si substrates,” Journal of The Electrochemical Society, vol.152, G688-G693 (2005) [24] S. Balakumar, M. M. Roy, B. Ramamurthy, C. H. Tung, Gao Fei, S. Tripathy, Chi Dongzhi, R. Kumar, N. Balasubramanian, and D. L. Kwong, “Fabrication aspects of germanium on insulator from sputtered Ge on Si-substrates,” Electrochemical and Solid-State Letters, vol. 9, G158-G160 (2006) [25] V. D. Cammilleri, V. Yam, F. Fossard, C. Renard, D. Bouchier, P. F. Fazzini, L. Ortolani, F. Houdellier, and M. Hÿtch, “Lateral epitaxial growth of germanium on silicon oxide,” Appl. Phys. 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Humphreys, “Review grain and subgrain characterisation by electron backscatter diffraction,” Journal of Materials Science, vol. 36, pp. 3833-3854 (2001) [40] F.J. Humphreys, “Characterisation of fine-scale microstructures by electron backscatter diffraction (EBSD),” Scripta Materialia, vol. 51, pp. 771-776 (2004) | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48018 | - |
| dc.description.abstract | 現今的半導體產業中，傳統的矽製程發展最成熟並且廣泛應用，因此矽材料仍為半導體產業的主流。但受限於物理上的限制，傳統矽製程終將面臨無法再縮小以求速度和成本降低的情況。所以本實驗發展了和矽同為四族半導體元素的鍺材料，其優點為遷移率較矽高，並且在光通訊波長較矽有更大的光吸收係數。因此將來可以利用其相較於矽的優點，用以結合傳統矽製程並發展更加快速之元件。
本實驗利用絕緣層上覆矽基板及純矽基板，開發出在二氧化矽絕緣層上覆多晶鍺之結構。在此我們利用低成本並且結合矽製程之液相結晶法來製作絕緣層上覆多晶鍺。此方法所憑藉的物理原理為使沉積上之非晶鍺利用一連串製程步驟來使其接觸初始材料之單晶矽，並將其快速加熱至熔點以上熔化，接著自然降溫凝固重新結晶，用以形成多晶鍺。 基於液相結晶法，本實驗成功利用兩種不同基板分別獲得鍺厚度約300nm和100nm之絕緣層上覆多晶鍺。並且其鍺區域約為5μm×5μm及10μm×10μm之陣列。另外，此實驗亦獲得長條狀約300nm厚之多晶鍺區域。藉由以上材料之製作，以期將來可使其整合在矽基板之新元件設計上，例如光偵測器。因此，此研究為將來半導體產業重要發展趨勢之一。 | zh_TW |
| dc.description.abstract | Traditional silicon technology is mature and widespread in application nowadays. Therefore, silicon is the main material in semiconductor industry. But by the limit of physics, silicon technology will finally face that it cannot reduce its scale in order to pursue high speed and low cost. Consequently, germanium as group IV as silicon is developed in this thesis. Its advantages are high mobility and larger absorption at communication wavelength than silicon. As a result, it can be combined with traditional silicon technology in order to develop more high-speed devices.
In this thesis, we developed poly-germanium on insulator (GOI) by SOI and Si substrates using a low-cost liquid phase epitaxy (LPE) method. Its principle is to anneal Ge above its melting point, and cool it rapidly in order to achieve recrystallization. We have acquired 300-nm-thick and 100-nm-thick poly-GOI respectively by two different methods in this study. Their patterns were 5μm×5μm and 10μm×10μm square arrays. In addition, we have also acquired 300-nm-thick strip GOI. By the method, it is expected to be integrated to Si substrates for new devices, such as photodetectors. Therefore, this investigation is one of the important development trends for semiconductor industry. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T06:44:31Z (GMT). No. of bitstreams: 1 ntu-100-R98943109-1.pdf: 2826801 bytes, checksum: 30185e22f6108dad83ac9569512881ba (MD5) Previous issue date: 2011 | en |
| dc.description.tableofcontents | Contents
Chapter1 Introduction 1 1.1 Overview 1 1.2 Literature Review 4 1.3 Organization of the Thesis 9 Chapter 2 Fabrication Method and Analysis Based on SOI Substrate 10 2.1 Fabrication Principle and Design 10 2.2 Process Flow 12 2.3 Experiment Results 16 2.3.1 Experiment Results of Mask-1 Design 16 2.3.2 Experiment Results of Mask-2 Design 20 2.4 Key Issues in the Process 22 2.4.1 Lithography 22 2.4.2 Dry Etching 26 2.4.3 Annealing 30 2.4.4 Removing Capping Oxide 32 2.5 Analysis and Discussion 33 Chapter 3 Fabrication Method and Analysis Based on Si Substrate 37 3.1 Fabrication Principle and Design 37 3.2 Process Flow 39 3.3 Experiment Results and Analysis 42 Chapter 4 Conclusions 46 4.1 Summary 46 4.2 Future Work 48 References 49 | |
| dc.language.iso | en | |
| dc.subject | 鍺 | zh_TW |
| dc.subject | 液相結晶法 | zh_TW |
| dc.subject | 絕緣層上覆鍺 | zh_TW |
| dc.subject | Germanium on Insulator (GOI) | en |
| dc.subject | Liquid-Phase-Epitaxy (LPE) | en |
| dc.subject | Ge | en |
| dc.title | 基於絕緣層上覆矽基板及純矽基板製作絕緣層上覆多晶鍺之研究 | zh_TW |
| dc.title | The Investigation of Polycrystalline Germanium on Insulator Based on SOI and Si Substrates | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 99-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 林致廷(Chih-Ting Lin),陳奕君(I-Chun Cheng) | |
| dc.subject.keyword | 鍺,絕緣層上覆鍺,液相結晶法, | zh_TW |
| dc.subject.keyword | Ge,Germanium on Insulator (GOI),Liquid-Phase-Epitaxy (LPE), | en |
| dc.relation.page | 55 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2011-06-30 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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