應用在雙向通道晶片網路架構的任務與傳輸排程

Abstract

本文提出一個應用在雙向通道晶片網路架構上的任務和傳輸排程演算法。雙向的晶片網路架構允許每一條通道能夠動態的自我調整傳送方向來提高晶片內網路的傳輸速度。一個詳細考慮傳輸時間和雙向通道晶片網路架構的傳輸排程可以藉由大幅降低傳輸所需的時間來增進系統整體效能。這篇論文提出了一個快速而有效率的任務配置及排程的演算法，並安排了詳細的傳輸路徑與時間。同時我們也提出一個搭配的效能提升程序以及一個自我學習的篩選框架，進一步的提升排程的效能。實驗結果說明我們的演算法比起較少考慮傳輸的演算法在雙向通道晶片網路架構上可以獲得更好的效能，而硬體的模擬結果也證明了在雙向通道晶片網路架構上設定詳細的傳輸時間有其必要性。

Task and communication scheduling over a Bidirectional Network-on-Chip (BiNoC) architecture is investigated. The BiNoC allows each communication channel to dynamically change direction in order to speed up data transmissions. The reduction of data transmission time by a BiNoC architecture and a proper communication-aware schedule can quite improve the overall performance. In this Thesis, an efficient task allocating and scheduling algorithm with specific communication consideration is proposed to minimize the total runtime. Also a performance refinement process with a self-study and sieve framework is developed to enhance the efficiency of our scheduling algorithm. Extensive experiments are performed to compare this proposed algorithm against task scheduling algorithms with less consideration of communication, and hardware simulations proves the importance and necessity of our communication scheduling.