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標題: | 應用於微波與毫米波之矽基分佈式放大器的研製 Design of Si-Based Distributed Amplifiers for Microwave and Millimeter-Wave Applications |
作者: | Ping Chen 陳平 |
指導教授: | 王暉 |
關鍵字: | 寬頻放大器,分佈式放大器(DA),互補式金氧半場效電晶體(CMOS),微波單晶積體電路(MMIC),左右手複合式傳輸線(CRLH-TL),雙向系統, wideband amplifier,distributed amplifier (DA),complementary metal-oxide-semiconductor (CMOS),monolithic microwave integrated circuit (MMIC),composite right/left-handed transmission line (CRLH-TL),bi-directional system, |
出版年 : | 2010 |
學位: | 碩士 |
摘要: | 隨著通訊技術的蓬勃,射頻電路正朝向更高頻率、更寬頻寬的趨勢發展。在寬頻系統中,如光纖通訊及超寬頻射頻通訊,由於傳輸速度快、資料量大,需要低成本、寬頻及平坦頻率響應的電路。而分佈式架構被廣為運用在寬頻放大器的實現。本論文回顧了分佈式放大器的基本操作原理及基礎定律。另一方面,探討過去幾年來分佈式放大器的發展,及不同分佈式架構間優缺點的比較。
接著,我們使用標準的0.18-μm CMOS製程設計並量測了兩個分佈式放大器。第一個為頻寬35 GHz的分佈式放大器。為了改善現有架構在增益、輸出功率與雜訊指數間的取捨,進而提出新的架構。此架構為傳統分佈式放大器與串接單級分佈式放大器的組合,可使寬頻放大器同時兼顧到增益、輸出功率與雜訊指數。從量測結果可知,此分佈式放大器有20.5 dB的小訊號增益,35 GHz的3-dB頻寬,371 GHz的增益頻寬積,8.5 dBm的最大輸出功率1dB壓縮點,而雜訊指數在5 GHz到26 GHz間介於6.8 dB到9.3 dB。晶片面積只有0.78平方毫米,而增益頻寬積對晶片面積的比例高達476 GHz/mm2。就我們所知,這個電路是目前0.18-μm CMOS分佈式放大器中,具有最高的增益頻寬積對晶片面積比例與最高的效能指數。和其它高階製程也有可比較的特性。 第二個為使用高通傳輸線的分佈式放大器,設計的頻段為22-29 GHz。因為電路架構的對稱性,此放大器有兩個放大訊號的路徑。將它運用於雙向系統中,可以達到放大器重複使用的特性。這個特性在需要大量元件才能達到高資料量傳輸的相位陣列中是重要的。相較於傳統分佈式放大器於雙向系統中運用,此放大器不需要額外的汲極偏壓電路,因為偏壓電路即是本身放大器的一部份。這也使得它僅需要較小的晶片面積。此晶片核心面積僅有0.17平方毫米。此分佈式放大器經由量測可得知在頻寬內,有12 dBm的最大輸出飽合功率,6.5 dBm的最大輸出功率1dB壓縮點,6.4 dB的小訊號增益,而且在兩個路徑上只有0.2 dB的差異。 With the development of communication technologies, RF integrated circuits move toward higher frequencies, wider bandwidth. In wideband systems, such as optical communication and ultra-wide band (UWB) communication, circuits with low cost, wide bandwidth and flat frequency response are required. The distributed configurations extensively find applications in the realization of wideband amplifiers. The basic operation and fundamental principles of the conventional distributed amplifier are reviewed. On the other hand, the development of the distributed amplifier in the recent years is discussed, and the advantages and disadvantages among the different topologies of distributed amplifiers are compared. Two distributed amplifiers using standard 0.18-μm CMOS technology were implemented and measured. The first one is a distributed amplifier with a bandwidth of 35 GHz. In order to resolve the trade-off among the gain, output power and noise figure in present topologies, a new topology is proposed. The topology is the combination of conventional distributed amplifier (CDA) and cascaded single-stage distributed amplifier (CSSDA), and it let wideband amplifier give considerations to the gain, output power and noise figure simultaneously. From the measurements, the distributed amplifier has a small signal gain of 20.5 dB, a 3-dB bandwidth of 35 GHz, and a gain-bandwidth product of 371 GHz. The maximum output 1-dB compression point (OP1dB) is 8.5 dBm and the noise figure is between 6.8 dB and 9.3 dB from 5 to 26 GHz. The chip size including testing pads is only 0.78 mm2, and the ratio of the gain-bandwidth to chip size achieves 476 GHz/mm2. To our knowledge, the circuit has the highest ratio of gain-bandwidth product to chip area and the highest figure of merit (FOM) in 0.18-μm CMOS, and it has a comparable performance with other advanced process. The second amplifier is a distributed amplifier using high-pass transmission lines, and its designed band is 22-29 GHz. Due to the symmetry of the circuit, the distributed amplifier has two paths to amplify the signals. When the distributed amplifier is used in bi-directional system, it can achieve the characteristic of amplifier reuse. The characteristic is important in phase array which requires many elements for high data rate communication. In contrast with conventional distributed amplifier used in bi-directional system, the amplifier does not need extra drain bias circuits since they are a part of the distributed amplifier. Hence, the chip size is smaller by using this approach. The core area is only 0.17 mm2 in this design. From the measurements, the distributed amplifier has a maximum saturation output power of 12 dBm, a maximum OP1dB of 6.5 dBm, and a small signal gain of 6.4 dB with only 0.2-dB difference in the two directions. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/46876 |
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顯示於系所單位: | 電信工程學研究所 |
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