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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/45884完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 王勝德 | |
| dc.contributor.author | Po-Wen Cheng | en |
| dc.contributor.author | 鄭博文 | zh_TW |
| dc.date.accessioned | 2021-06-15T04:48:05Z | - |
| dc.date.available | 2012-08-06 | |
| dc.date.copyright | 2010-08-06 | |
| dc.date.issued | 2010 | |
| dc.date.submitted | 2010-08-02 | |
| dc.identifier.citation | [1] D. Adjeroh, et al., 'BWT-based efficient shape matching,' 2007, p. 1085.
[2] S. Belongie, et al., 'Shape matching and object recognition using shape contexts,' Pattern Analysis and Machine Intelligence, IEEE Transactions on, vol. 24, pp. 509-522, 2002. [3] C. Rambabu, et al., 'Flooding-based watershed algorithm and its prototype hardware architecture,' Vision, Image and Signal Processing, IEE Proceedings -, vol. 151, pp. 224-234, 2004. [4] V. Osma-Ruiz, et al., 'An improved watershed algorithm based on efficient computation of shortest paths,' Pattern Recognition, vol. 40, pp. 1078-1090, 2007. [5] H. Kim and S. de Araujo, 'Grayscale template-matching invariant to rotation, scale, translation, brightness and contrast,' Advances in Image and Video Technology, pp. 100-113, 2007. [6] H. P. A. Nobre and K. Hae Yong, 'Automatic VHDL generation for solving rotation and scale-invariant template matching in FPGA,' in Programmable Logic, 2009. SPL. 5th Southern Conference on, 2009, pp. 21-26. [7] H.-S. Hsiao, 'HW/SW Co-Design of Real-Time Video Processing,' Master, Electrical, Communication and Electronics Engineering, National Taiwan University, Taipei, 2009. [8] S. Hezel, et al., 'FPGA-based template matching using distance transforms,' in Field-Programmable Custom Computing Machines, 2002. Proceedings. 10th Annual IEEE Symposium on, 2002, pp. 89-97. [9] K. Nakano and E. Takamichi, 'An image retrieval system using FPGAs,' in Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific, 2003, pp. 370-373. [10] M. Yoshimura, et al., 'Hardware design of vector code correlation method for high-speed template matching,' in Control, Automation and Systems, 2008. ICCAS 2008. International Conference on, 2008, pp. 2529-2532. [11] P. Beukelman and L. Bierens, 'A reconfigurable architecture for real-time rotation and scale invariant template matching algorithms on streaming images,' 2005, p. 494. [12] K. Dongkyun, et al., 'Real-time binary shape matching system based on FPGA,' in Robotics and Biomimetics, 2008. ROBIO 2008. IEEE International Conference on, 2009, pp. 1194-1199. [13] S. de Araujo and H. Kim, 'Rotation, scale and translation-invariant segmentation-free grayscale shape recognition using mathematical morphology,' 2007. [14] Y. Lin and C. Chen, 'Template matching using the parametric template vector with translation, rotation and scale invariance,' Pattern Recognition, vol. 41, pp. 2413-2421, 2008. [15] S. Chien, et al., 'Hybrid morphology processing unit architecture for moving object segmentation systems,' The Journal of VLSI Signal Processing, vol. 42, pp. 241-255, 2006. [16] C. Shao-Yi, et al., 'Partial-result-reuse architecture and its design technique for morphological operations with flat structuring elements,' Circuits and Systems for Video Technology, IEEE Transactions on, vol. 15, pp. 1156-1169, 2005. [17] D. Coltuc and I. Pitas, 'Fast computation of a class of running filters,' Signal Processing, IEEE Transactions on, vol. 46, pp. 549-553, 1998. [18] Altera PIO core. Available: http://www.altera.com/literature/hb/nios2/n2cpu_nii51007.pdf [19] Altera Avalon Interface Specifications. Available: http://www.altera.com/literature/manual/mnl_avalon_spec.pdf [20] Altera SignalTap II. Available: http://www.altera.com/literature/an/an323.pdf [21] Terasic Technologies. Available: http://www.terasic.com.tw/ | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/45884 | - |
| dc.description.abstract | 由於以樣板做為比對的基準之方法具有有效性及簡單性,所以近年來常常被用來在影像中偵測想要的物件。至於硬體實現方面,為了讓這些相關技術能夠在速度上有所提升,不管對於演算法上的改進,或者是架構上的改進,均有相當多的文獻提出相對應的解決辦法。然而許多文獻只針對某個部份做加強,並沒有考慮到整個架構的完善性。所以當這些架構要被應用到真正的視訊系統時,便會有許多問題隨之產生。本文從中選擇了一個比較強健的演算法,並試圖在我們實驗室所發展的即時視訊系統上實作其硬體架構。除此之外,對於該演算法來說,有些運算結果是可以預先計算的,因此我們移除了這些相關的運算單元來降低演算法所需的硬體資源,並且讓CPU以動態的方式負責去計算出這些結果。也就是說,在視訊系統運行當中,我們可以任意地變換這些值,使得整個視訊系統會有不太一樣的功能。最後由實驗結果可知,我們不僅成功地減少了整個架構所需的硬體資源,並且也讓我們的視訊系統一樣地維持在它原來的時脈頻率下運作,保有了即時的特性。 | zh_TW |
| dc.description.abstract | Template-based matching methods are often used for object detection because of their effectiveness and simplicity. To accelerate the speed of template matching in hardware implementation, there have been many studies on either algorithmic or architectural improvements. However, they are often lack of comprehensive considerations, resulting in the fact that many of them cannot be adopted for a practical application. In this thesis, we try implementing in hardware an algorithm that is more robust among all the studies, and integrate it into the real-time video system developed by our laboratory. Besides, we reduce the overall hardware resources required for the algorithm by removing some arithmetic units whose results can be pre-computed offline. The CPU in the video system is then instructed to calculate these results dynamically when the system is operating. Experimental results show that our modification of the architecture indeed achieves a reduction in the logic elements needed. Moreover, the video system with the template matching function inside can still work at its original clock rate, preserving the real-time characteristic. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T04:48:05Z (GMT). No. of bitstreams: 1 ntu-99-R97921073-1.pdf: 2468395 bytes, checksum: 3718aa1e94b475f90aee6b2624cf00a1 (MD5) Previous issue date: 2010 | en |
| dc.description.tableofcontents | 口試委員會審定書 I
致謝 II 摘要 III ABSTRACT IV CONTENTS VI FIGURES VIII TABLES X CHAPTER 1 INTRODUCTION 1 1.1 OBJECT DETECTION INTRODUCTION 1 1.2 CONTRIBUTIONS 4 1.3 THESIS ORGANIZATION 6 CHAPTER 2 RELATED WORK 8 CHAPTER 3 HARDWARE DESIGN 15 3.1 ALGORITHM DESCRIPTION 15 3.1.1 Circular Sampling Filter 16 3.1.2 Radial Sampling Filter 19 3.1.3 Template Matching Filter 22 3.1.4 Matching Criterion 23 3.2 HARDWARE ARCHITECTURE 24 3.2.1 Architecture of the Circular Sampling Filter Block 27 3.2.2 Architecture of the Correlation Coefficient Block 32 3.2.3 Architecture of the Comparison Block 36 3.2.4 Architecture of the RGB Output Block 38 CHAPTER 4 SYSTEM ARCHITECTURE 40 4.1 THE CMOS CONTROLLER 41 4.2 THE LTM CONTROLLER 43 4.3 THE NIOS II CPU 44 4.4 BUS BANDWIDTH DISTRIBUTION 45 CHAPTER 5 EXPERIMENTAL RESULTS 47 5.1 EXPERIMENT SETUP 47 5.2 SIMULATION RESULTS 47 5.2.1 Circular Sampling Filter 48 5.2.2 Correlation Coefficient 49 5.3 SYNTHESIS RESULTS 51 5.4 FUNCTIONAL VERIFICATION 53 CHAPTER 6 CONCLUSION 56 REFERENCES 58 | |
| dc.language.iso | en | |
| dc.subject | 系統晶片 | zh_TW |
| dc.subject | 影像處理 | zh_TW |
| dc.subject | 樣板比對 | zh_TW |
| dc.subject | 即時 | zh_TW |
| dc.subject | 視訊 | zh_TW |
| dc.subject | Template Matching | en |
| dc.subject | SoC | en |
| dc.subject | Video | en |
| dc.subject | Real-Time | en |
| dc.subject | Image Processing | en |
| dc.title | 整合快速樣板比對電路之即時視訊形體偵測系統 | zh_TW |
| dc.title | An Efficient Template Matching Architecture for Real-Time Shape-Based Detection Systems | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 98-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 鄭振牟,鍾國亮,李嘉晃,洪士灝 | |
| dc.subject.keyword | 影像處理,樣板比對,即時,視訊,系統晶片, | zh_TW |
| dc.subject.keyword | Image Processing,Template Matching,Real-Time,Video,SoC, | en |
| dc.relation.page | 59 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2010-08-04 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位: | 電機工程學系 | |
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