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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 郭大維(Tei-Wei Kuo) | |
dc.contributor.author | Lue-Jane Lee | en |
dc.contributor.author | 李律真 | zh_TW |
dc.date.accessioned | 2021-06-15T04:09:56Z | - |
dc.date.available | 2011-08-19 | |
dc.date.copyright | 2011-08-19 | |
dc.date.issued | 2011 | |
dc.date.submitted | 2011-08-17 | |
dc.identifier.citation | [1] Flash-memory Translation Layer for NAND
ash (NFTL). M-Systems, 1998. [2] N. Agrawal, V. Prabhakaran, T. Wobber, J. D. Davis, M. Manasse, and R. Pani- grahy. Design Tradeoffs for SSD Performance. In the Proceedings of the USENIX Technical Conference, June 2008. [3] A. Ban. Flash le system, Apr. 4 1995. US Patent 5,404,485. [4] L.-P. Chang and T.-W. Kuo. An Adaptive Striping Architecture for Flash Memory Storage Systems of Embedded Systems. In the IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), pages 187-196, 2002. [5] Y. Chang and L. Chang. A self-balancing striping scheme for NAND- ash storage systems. In Proceedings of the 2008 ACM symposium on Applied computing, pages 1715-1719. ACM, 2008. [6] Y. Chang, W. Lu, P. Huang, L. Lee, and T. Kuo. An Efficient FTL Design for Multi-chipped Solid-State Drives. In The Sixteenth IEEE International Confer- ence on Embedded and Real-Time Computing Systems and Applications, pages 237-246. IEEE, 2010. [7] Y.-H. Chang and T.-W. Kuo. A Commitment-based Management Strategy for the Performance and Reliability Enhancement of Flash-memory Storage Systems. In the 46th ACM/IEEE Design Automation Conference (DAC), 2009. [8] A. O. Company. Yet Another Flash Filing System. URL http://www.aleph1. co.uk/yaffs/. [9] Flash Contract Price, http://www.dramexchange.com/. DRAMeXchange, 04 2011. [10] H. Frost, J. Fuxa, and C. Camp. Method and apparatus for protecting data using variable size page stripes in a FLASH-based storage system, Dec. 21 2010. US Patent 7,856,528. [11] L. Grupp, A. Caulfield, J. Coburn, S. Swanson, E. Yaakobi, P. Siegel, and J. Wolf. Characterizing ash memory: anomalies, observations, and applications. In Pro- ceedings of the 42nd Annual IEEE/ACM International Symposium on Microar- chitecture, pages 24-33. ACM, 2009. [12] A. Gupta, Y. Kim, and B. Urgaonkar. DFTL: a ash translation layer employing demand-based selective caching of page-level address mappings. In Proceeding of the 14th international conference on Architectural support for programming languages and operating systems, pages 229-240. ACM, 2009. [13] W. Hutsell, J. Bowen, and N. Ekker. Flash Solid-State Disk Reliability. Texas Memory Systems White Paper, 2008. [14] S. Im and D. Shin. Delayed partial parity scheme for reliable and high-performance ash memory SSD. In 2010 IEEE 26th Symposium on Mass Storage Systems and Technologies (MSST), pages 1-6. IEEE, 2010. [15] S. Im and D. Shin. Flash-Aware RAID Techniques for Dependable and High- Performance Flash Memory SSD. IEEE Transactions on Computers, pages 80-92, 2010. ISSN 0018-9340. [16] A. Kadav, M. Balakrishnan, V. Prabhakaran, and D. Malkhi. Differential RAID: rethinking RAID for SSD reliability. ACM SIGOPS Operating Systems Review, 44(1):55-59, 2010. ISSN 0163-5980. [17] Y. Kang and E. Miller. Adding aggressive error correction to a high-performance compressing ash le system. In Proceedings of the seventh ACM international conference on Embedded software, pages 305-314. Citeseer, 2009. [18] J. Kim, J. Kim, S. Noh, S. Min, and Y. Cho. A space-efficient ash translation layer for compact ash systems. Consumer Electronics, IEEE Transactions on, 48 (2):366-375, 2002. ISSN 0098-3063. [19] S. Lee, D. Park, T. Chung, D. Lee, S. Park, and H. Song. A log buffer-based ash translation layer using fully-associative sector translation. ACM Transactions on Embedded Computing Systems (TECS), 6(3):18-es, 2007. ISSN 1539-9087. [20] Y. Lee, S. Jung, M. Choi, and Y. Song. An efficient management scheme for up- dating redundant information in ash-based storage system. Design Automation for Embedded Systems, pages 1-25. ISSN 0929-5585. [21] Y. Lee, S. Jung, and Y. Song. FRA: a ash-aware redundancy array of ash storage devices. In Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis, pages 163-172. ACM, 2009. [22] V. Malik. JFFS - A Practical Guide, May 2001. URL http://www. embeddedlinuxworks.com/articles/jffs_guide.html. [23] B. Mao, H. Jiang, D. Feng, S.Wu, J. Chen, L. Zeng, and L. Tian. HPDA: A hybrid parity-based disk array for enhanced performance and reliability. In Parallel & Distributed Processing (IPDPS), 2010 IEEE International Symposium on, pages 1-12. IEEE. [24] MT29F32G08CBABA 32Gb NAND MLC Flash Memory Data Sheet. Micron, 2009. 24 [25] MT29F16G08ABABA 16Gb NAND SLC Flash Memory Data Sheet. Micron, 2009. [26] D. Narayanan, E. Thereska, A. Donnelly, S. Elnikety, and A. Rowstron. Migrating server storage to SSDs: analysis of tradeoffs. In Proceedings of the 4th ACM European conference on Computer systems, pages 145-158. ACM, 2009. [27] TC58NVG4T2ETA00 16Gb NAND TLC Flash Memory Data Sheet. Toshiba, 2008. [28] S. Wicker and V. Bhargava. Reed-Solomon codes and their applications. Wiley- IEEE Press, 1999. [29] C.-H. Wu and T.-W. Kuo. An Adaptive Two-level Mnagement for the Flash Translation Layer in Embedded Systems. In the IEEE/ACM Iinternational Con- ference on Computer-Aided Design (ICCAD), pages 601-606, 2006. ISBN 1- 59593-389-1. doi: http://doi.acm.org/10.1145/1233501.1233624. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/45231 | - |
dc.description.abstract | 由於固態硬碟的抗震性強、效能好使之近年來在儲存系統中佔有越來越重要的地位。由於容量及價格的考量,供應商趨向使用較低階的快閃記憶體,使得效能和可靠性未必能達到要求,因此將分塊與冗餘技術應用在快閃記憶體上已成為必要的趨勢。本論文提出一個針對快閃記憶體特性而設計的可靠性導向的分塊機制,其中包含可調節的分塊管理及考量使用壽命延長的使用策略。實驗結果顯示,本機制可有效的減少快閃記憶體的抹除次數,進而提升快閃記憶體的可靠性。 | zh_TW |
dc.description.provenance | Made available in DSpace on 2021-06-15T04:09:56Z (GMT). No. of bitstreams: 1 ntu-100-R98922024-1.pdf: 1443402 bytes, checksum: 7e72923b0d6976155762920ea205b03a (MD5) Previous issue date: 2011 | en |
dc.description.tableofcontents | 口試委員會審定書: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : i
中文摘要: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : ii ABSTRACT : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : iii LIST OF FIGURES : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : v LIST OF TABLES : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : vi CHAPTER I. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 II. Background and Motivation . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 III. Reliability-driven Striping . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 An Adaptive Merging Policy . . . . . . . . . . . . . . . . . . . 7 3.3 A Wear-level-aware Mapping Mechanism . . . . . . . . . . . . . 9 3.4 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 IV. Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . 15 4.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . 16 V. Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 BIBLIOGRAPHY : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 21 | |
dc.language.iso | en | |
dc.title | 固態硬碟之可靠性導向分塊機制 | zh_TW |
dc.title | Reliability-Driven Striping for Solid-State Drives | en |
dc.type | Thesis | |
dc.date.schoolyear | 99-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 黃佑充,張原豪,逄愛君,薛智文,陳銘憲 | |
dc.subject.keyword | 固態硬碟,快閃記憶體,可靠性,分塊,冗餘, | zh_TW |
dc.subject.keyword | solid-state drives,flash memory,reliability,striping,redundancy, | en |
dc.relation.page | 24 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2011-08-17 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 資訊工程學研究所 | zh_TW |
顯示於系所單位: | 資訊工程學系 |
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