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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 資訊工程學系
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/44595
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dc.contributor.advisor劉邦鋒(Pangfeng Liu)
dc.contributor.authorChin-Hao Changen
dc.contributor.author張津豪zh_TW
dc.date.accessioned2021-06-15T03:51:32Z-
dc.date.available2012-07-20
dc.date.copyright2010-07-20
dc.date.issued2010
dc.date.submitted2010-07-13
dc.identifier.citation[1] E. Perelman, M. Polito, J.Y. Bouguet, J. Sampson, B. Calder, and C. Dulong. Detecting phases in parallel applications on shared memory architectures. In IEEE International Parallel and Distributed Processing Symposium, April 2006.
[2] H. Patil, R. Cohn, M. Charney, R. Kapoor, A. Sun, and A. Karunanidhi. Pinpointing representative portions of large intel®itanium®programs with dynamic instrumentation. In Proceedings of the 37th Annual IEEE/ACM International Symposium on Microarchitecture, pages 81–92, Washington, DC, USA, 2004. IEEE Computer Society.
[3] T. Sherwood, E. Perelman, and B. Calder. Basic block distribution analysis to find periodic behavior and simulation points in applications. In Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques, pages 3–14, Washington, DC, USA, 2001. IEEE Computer Society.
[4] T. Sherwood, E. Perelman, G. Hamerly, and B. Calder. Automatically characterizing large scale program behavior. In Proceedings of the 10th international conference on Architectural support for programming languages and operating systems, pages 45–57, New York, NY, USA, 2002. ACM.
[5] E. Perelman, G. Hamerly, and B. Calder. Picking statistically valid and early simulation points. In Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques, page 244, Washington, DC, USA, 2003. IEEE Computer Society.
[6] Y. Zhang, B. Özisikyilmaz, G. Memik, J. Kim, and A.N. Choudhary. Analyzing the impact of on-chip network traffic on program phases for cmps. In Proceeding of IEEE International Symposium on Performance Analysis of Systems and Software, pages 218–226, 2009.
[7] M.V. Biesbrouck, L. Eeckhout, and B. Calder. Efficient sampling startup for sampled processor simulation. In HiPEAC, pages 47–67, 2005.
[8] C. Isci and M. Martonosi. Identifying program power phase behavior using power vectors. In Proceedings of the International Workshop on Workload Characterization, 2003.
[9] T. Sherwood, S. Sair, and B. Calder. Phase tracking and prediction. In Proceedings of the 30th Annual International Symposium on Computer Architecture, pages 336–347, June 2003.
[10] J. Lau, S. Schoenmackers, and B. Calder. Transition phase classification and prediction. In Proceedings of the 11th International Symposium on High-Performance Computer Architecture, pages 278–289, Washington, DC, USA, 2005. IEEE Computer Society.
[11] A.S. Dhodapkar and J.E. Smith. Managing multi-configuration hardware via dynamic working set analysis. In Proceedings of the 29th Annual International Symposium on Computer Architecture, pages 233–244, 2002.
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[13] J. Lau, S. Schoemackers, and B. Calder. Structures for phase classification. In Proceedings of the 2004 IEEE International Symposium on Performance Analysis of Systems and Software, pages 57–67, Washington, DC, USA, 2004. IEEE Computer Society.
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[15] M. Annavaram, R. Rakvic, M. Polito, J.Y. Bouguet, R.A. Hankins, and B. Davies. The fuzzy correlation between code and performance predictability. In Proceedings of the 37th Annual IEEE/ACM International Symposium on Microarchitecture, pages 93–104, Washington, DC, USA, 2004. IEEE Computer Society.
[16] E. Duesterwald, C. Cascaval, and S. Dwarkadas. Characterizing and predicting program behavior and its variability. In Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques, page 220, Washington, DC, USA, 2003. IEEE Computer Society.
[17] J. Lau, E. Perelman, G. Hamerly, T. Sherwood, and B. Calder. Motivation for variable length intervals and hierarchical phase behavior. In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005, pages 135–146, Washington, DC, USA, 2005. IEEE Computer Society.
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[19] Pin. http://www.pintool.org/.
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[22] F. Vandeputte, L. Eeckhout, and K. De Bosschere. Exploiting program phase behavior for energy reduction on multi-configuration processors. Journal of Systems Architecture, 53(8):489–500, 2007.
[23] E. Ipek, J.F. Martinez, B.R. de Supinski, S.A. McKee, and M. Schulz. Dynamic program phase detection in distributed shared-memory multiprocessors. Proceedings 20th IEEE International Parallel & Distributed Processing Symposium, 0:315, 2006.
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/44595-
dc.description.abstract程式執行行爲常有重複執行的現象,因此如果可以認出重複執行的部分,則可以最佳化程式執行。若可將程式執行區段準確分類到適當的類別裡,並且可以利用這些分類資訊來預測下一區段所屬的類別,則可及時啟用一個適當的最佳化方法於下一個區段執行。這樣的最佳化機會不僅出現在單一執行緒的程式裡,也會出現在多執行緒的程式裡。
在本篇論文裡,我們提出一個架構能夠蒐集每個執行緒所執行的每個區段的程式特徵,並且在程式執行時將每個區段分類到適當的類別裡。最後利用這些分類結果來預測下一區段的類別。爲了提高分類的效率,我們只儲存固定數目的代表資訊來做分類,因此分類的效率很高而且所需的記憶體空間小於三千個位元組。另外我們使用信心表格來提高預測準度。我們的架構能夠將區段分到適當類別裡使得同一類別裡的區段間行爲非常類似。且下一個區段所屬的類別的預測準度爲65%。若加入信心表格,則預測準度提高至80%。
zh_TW
dc.description.abstractProgram executions are usually repetitive; hence, we can optimize program executions if we are able to identify the program’s repetition pattern. If we can accurately classify program execution intervals into phases, and use such information to accurately predict the next phase at runtime, we will be able to apply suitable optimization on the coming intervals. Such runtime optimization opportunity not only exists in single-threaded programs but also in multi-threaded programs (e.g. OpenMP codes, which exhibit repetitive behavior).
In this paper, we propose a framework that collects code signature of each interval from individual threads of a multi-threaded parallel program, and classify them into phases at runtime. We then use the classification results to predict the next phase in an on-line fashion. In order to efficiently classify execution intervals on-line, we only keep a fixed number of representative data in a shared table for classification purpose. The classification is very efficient and uses less than 3K bytes of memory. We also propose a confidence table to improve the prediction rate. Our system can classify intervals into phases with high homogeneity, can predict the next phase with 65% accuracy without using confidence and with 80% accuracy when confidence table is used.
en
dc.description.provenanceMade available in DSpace on 2021-06-15T03:51:32Z (GMT). No. of bitstreams: 1
ntu-99-R97922147-1.pdf: 926322 bytes, checksum: 62381b2afa22389ad5aeadd6ab2f7058 (MD5)
Previous issue date: 2010
en
dc.description.tableofcontentsCertification i
Acknowledgement ii
Chinese Abstract iii
Abstract iv
1 Introduction 1
2 Related Work 4
3 On-line Phase Classification 6
3.1 Phase Behavior in Parallel Programs ........................ 6
3.2 Phase Classification in Our Framework....................... 8
3.3 Right Shift the Sampled EIP ............................ 11
3.4 Determine the Similarity Distance Threshold ................... 12
3.5 Add Confidence Table to Classification....................... 14
4 Next Phase Prediction 16
4.1 Last Value Prediction................................ 17
4.2 N-Level Markov Chain Prediction ......................... 17
4.3 Run-Length Encoding Markov Chain Prediction .................. 17
4.4 Enhanced RLE Markov Chain Prediction ..................... 18
5 Experimental Results 19
5.1 Benchmarks Used and Experimental Environment ................. 19
5.2 Phase Classification................................. 19
5.2.1 The Effect of The Centroid Table Size ................... 19
5.2.2 The Quality of Classification Among Different Number of Threads . . . 21
5.2.3 The Effect of Min Counter Threshold in ConfidenceTable ........ 22
5.2.4 Summary.................................. 23
5.3 Phase Prediction................................... 23
5.3.1 Prediction Performance Without ConfidenceTable ............ 24
5.3.2 Prediction Performance With Confidence Table .............. 24
5.3.3 Summary.................................. 25
6 Conclusions 26
Bibliography 27
dc.language.isoen
dc.title以取樣爲基礎之多執行緒程式行爲分類與預測zh_TW
dc.titleSampling-Based Phase Classification and Prediction for Multi-threaded Program Executionen
dc.typeThesis
dc.date.schoolyear98-2
dc.description.degree碩士
dc.contributor.coadvisor吳真貞(Jan-Jan Wu)
dc.contributor.oralexamcommittee游本中(Pen-Chung Yew),徐慰中(Wei-Chung Hsu),陳添福(Tien-Fu Chen)
dc.subject.keyword程式區段,類別,多執行緒程式,程式特徵,類別預測,zh_TW
dc.subject.keywordinterval,phase,multi-threaded program,code signature,phase prediction,en
dc.relation.page29
dc.rights.note有償授權
dc.date.accepted2010-07-13
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept資訊工程學研究所zh_TW
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