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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黃天偉(Tian-Wei Huang) | |
| dc.contributor.author | Yen-Hung Kuo | en |
| dc.contributor.author | 郭彥宏 | zh_TW |
| dc.date.accessioned | 2021-06-15T02:55:27Z | - |
| dc.date.available | 2009-08-13 | |
| dc.date.copyright | 2009-08-13 | |
| dc.date.issued | 2009 | |
| dc.date.submitted | 2009-08-03 | |
| dc.identifier.citation | [1] “Federal Communications Commission,” FCC 02-04, Section XV.515.15.521.
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/44401 | - |
| dc.description.abstract | 在本論文中，將介紹在通訊系統中產生穩定的載波所需要的鎖相迴路的二個重要電路，壓控振盪器和注入鎖定之除頻器。並將此二個電路設計、量測。 此二個電路都有著低功率和寬頻的特性。 第一個K-band 壓控振盪器使用0.18 微米台積電所提供之金氧半導體製程。第二個電路也是應用於K-band 的注入鎖定除頻器，也是使用0.18 微米台積電所提供之金氧半導體製程。
應用於K-band 的電流再利用，變壓器型態之壓控振盪器，量測的結果為16.8%的頻率可調範圍，以及直流功率消耗1.7 毫瓦，相位雜訊在1MHz 為-95dBc/Hz。是為了K-band系統而設計的壓控振盪器。 為了增加頻率的可調範圍，所採用的架構為變壓器的型態來消除下一級放大器的雜散電容，使得可調電容的比例可以比較大，最後也會有比較大的頻率可調範圍。 鎖相迴路的前端電路(壓控振盪器和第一級除頻器) 都是比較難實現的電路，因為他們所操作的頻率較高，所以一個應用於K-band 的第一級除頻器也是研究的重點之一，本論文所提出的注入鎖定之除頻器，所採用的電流再利用架構有效的減少功率消耗，並且加上電感提升混頻器的轉導，增加其鎖定頻寬。 此注入鎖定除頻器有著 1.45 毫瓦的低功率，以及5.5 GHz 的寬鎖定範圍 (在0dBm注入功率下) 達到23.6%的頻寬，由於此電路的低功耗和寬鎖定範圍，很適合整合在鎖相迴路的系統當中。 | zh_TW |
| dc.description.abstract | This thesis includes the design methodology and implementation of two important building blocks of phase locked loop, voltage controlled oscillator and frequency divider, which are the essential components of generation of steady carrier frequency in communication system. These two circuits feature low-power and wide bandwidth. The K-band voltage controlled oscillator and injection locked frequency divider are using TSMC 0.18 | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T02:55:27Z (GMT). No. of bitstreams: 1 ntu-98-R96942023-1.pdf: 1138889 bytes, checksum: b6ff6927f22209ce4e03e42dfda1577d (MD5) Previous issue date: 2009 | en |
| dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 中文摘要 ii ABSTRACT iii CONTENTS iv LIST OF FIGURES vi LIST OF TABLES ix Chapter 1 Introduction 1 1.1 Research Motivation 1 1.2 Literature Survey 2 1.3 Contributions 3 1.4 Chapter Outlines 3 Chapter 2 Basics of Voltage-Controlled Oscillators 5 2.1 Oscillation Condition 5 2.2 Monolithic Inductors and Voltage Controlled Capacitors 9 2.3 Phase Noise 13 Chapter 3 Basics of Frequency Divider 18 3.1 Static Frequency Divider 18 3.2 Dynamic Frequency Divider 20 Chapter 4 Design of Transformer Coupled Current-Reused Voltage Controlled Oscillator 24 4.1 Circuit Design 24 4.2 Measured Results 30 4.3 Conclusion 32 Chapter 5 Design Current-Reused Injection-Locked Frequency Divider 34 5.1 Circuit Design 34 5.2 Simulated and Measured Results 38 5.3 Conclusion 43 Chapter 6 Phase Locked Loop Front-End and System Simulation 44 6.1 Measured Results 44 6.2 System Simulation 46 6.3 Conclusion 54 Chapter 7 Conclusion 55 REFERENCE 56 | |
| dc.language.iso | en | |
| dc.subject | 鎖相迴路 | zh_TW |
| dc.subject | 壓控振盪器 | zh_TW |
| dc.subject | 除頻器 | zh_TW |
| dc.subject | VCO | en |
| dc.subject | frequency divider | en |
| dc.subject | PLL | en |
| dc.title | 低功率壓控振盪器和注入鎖定之除頻器的研製 | zh_TW |
| dc.title | Design of Low-Power Voltage-Controlled Oscillators and Injection-Locked Frequency Divider | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 97-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 蔡政翰(Jeng-Han Tsai),林坤佑(Kun-You Lin) | |
| dc.subject.keyword | 壓控振盪器,除頻器,鎖相迴路, | zh_TW |
| dc.subject.keyword | VCO,frequency divider,PLL, | en |
| dc.relation.page | 60 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2009-08-03 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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|---|---|---|---|
| ntu-98-1.pdf 未授權公開取用 | 1.11 MB | Adobe PDF |
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