CMOS差動式微位移感測電路研製

Abstract

本論文之目的旨在探討環形振動式陀螺儀的感測電路設計與實現。環形振動式陀螺儀是利用微機電製程所製造的微小結構，透過振動時結構的改變所產生的電容值變化，來推算角速度的變化量。而這個電容值的變化非常微小，通常在fF等級，因此若使用打線將訊號外接到電路板上會造成訊號太小雜訊過大而無法觀測到理想的訊號。因此本論文將感測電路積體化，藉此減少打線的距離以及電路的雜訊，提升訊號的靈敏度。 由於整體電路為電容感測架構，所以感測訊號的速度將受限於電容充放電時間的限制。因此本論文另設計不同工作週期的載波，來增加感測的時間，提升整體晶片效能。 本論文使用國家晶片系統設計中心(NSC Chip Implementation Center, CIC)所提供的台灣積體電路(TSMC)0.35μm Mixed-Signal 2P4M Polycide 3.3/5V的製程，並使用Synopsys 公司所出的Hspice電路模擬軟體與Cadence公司的Virtuoso軟體進行模擬及佈線。

Probing into design of the capacitance detecting circuit for the ring type gyroscope is the purpose of this thesis. Ring type gyroscope is a small structure made with MEMS process. The sensing signal of this gyroscope due to the gap changes while the angular velocity variation , then the capacitive value between the gap changes too. The capacitive value is very small and usually of fF grade. If we connect this signal to the sensing circuit on PCB , this signal can not be examined out because the signal/noise ratio is too small. So in this thesis , we design and fabrication the capacitance sensing circuit in integrated circuit technology in order to reduce the noise of the sensing circuit. For our capacitive displacement sensing circuit, the work efficiency is limited by the capacitor charge and discharge times. Therefore, we use the different duty cycle carrier to increase the sensing time and the overall structure performance. This dissertation is applying 0.35μm Mixed-Signal 2P4M Polycide 3.3/5V manufacture process of TSMC which is provided by NSC Chip Implementation Center. Finally, using Hspice software designed by Synopsys co. to simulate and Virtuoso software designed by Candence co. to layout.