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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/43305
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor胡振國(Jenn-Gwo Hwu)
dc.contributor.authorHui-Ting Luen
dc.contributor.author盧卉庭zh_TW
dc.date.accessioned2021-06-15T01:48:27Z-
dc.date.available2010-07-16
dc.date.copyright2009-07-16
dc.date.issued2009
dc.date.submitted2009-07-06
dc.identifier.citation[1] Hong Xiao, “Introduction to Semiconductor Manufacturing Technology,” copyright 2001 by Prentice-Hall Inc.
[2] L. Kang, B. H. Lee, W. J. Qi, Y. Jeon, R. Nieh, S. Gopalan, K. Onishi, and J. C. Lee, “Electrical Characteristics of Highly Reliable Ultrathin Hafnium Oxide Gate Dielectric,” IEEE Electron Device Lett., vol. 21, pp. 181-183, April 2000.
[3] C. S. Kang, H. J. Cho, R. Choi, Y. H. Kim, C. Y. Kang, S. J. Rhee, C. Choi, M. S. Akbar, and J. C. Lee, “The Electrical and Material Characterization of Hafnium Oxynitride Gate Dielectrics With TaN-Gate Electrode,” IEEE Electron Device Lett., vol. 51, pp. 220-227, Feb. 2004.
[4] M. Houssa, M. Naili, V. V. Afanas’ev, M. M. Heyns and A. Stesmans, “Electrical and Physical Characterization of High-k Dielectric Layers,” in Proc. IEEE VLSI-TSA Conf., Taiwan, R. O. C., 2001, pp. 196-199.
[5] H. Gruger, Ch. Kunath, E. Kurth, S. Sorge, W. Pife, T. Pechstein, “High Quality r.f. Sputtered Metal Oxides (Ta¬2O5¬, HfO2) and Their Properties after Annealing,” Thin Solid Films, pp. 509-515, 2004.
[6] B. H. Lee et al., “Ultrathin Hafnium Oxide with Low Leakage and Excellent Reliability for Alternative Gate Dielctric Application,” IEDM Tech. Dig., 1999, p.133.
[7] J. K. Schaeffer, S. B. Samavedam, D. C. Gilmer, V. Dhandapani, P. J. Tobin, J. Mogab, B. -Y. Nguyen, B. E. White Jr, S. Dakshina-Murthy, R. A. Rai, Z. –X. Jiang, R. Martin, M. V. Raymond, M. Zavala, L. B. La, J. A. Smith, R. Garcia, D. Roan, M. Kottke, and R. B. Gregory, “Physical and Electrical Properties of Metal Gate Electrodes on HfO2 Gate Dieletrics,” J. Vac. Sci. Technol. B, vol. 21, pp. 11-17, 2003.
[8] A. Kerber, E. Cartier, L. Pantisano, R. Degraeve, T. Kauerauf, Y. Kim, A. Hou, G. Groeseneken, H. E. Maes, U. Schwalke, “Origin of the Threshold Voltage Instability in SiO2/HfO2 Dual Layer Gate Dielectrics,” IEEE Electron Device Lett., vol. 24, pp. 87-89, Feb. 2003.
[9] D. M Kim, S. J. Song, H. T. Kim, S. H. Song, D. J. Kim, K. S. Min, and D. W. Kang, “Deep-Depletion High-Frequency Capacitance-Voltage Response Under Photonic Excitation and Distribution of Interface States in MOS Capacitors,“ IEEE Trans. Electro Devices, vol. 50, pp. 1131-1134, April 2003.
[10] D. A. Neamen, “Semiconductor Physics and Devices – Basic Principles,” 3rd edition, 2003, published by McGraw-Hill Inc.
[11] E. H. Nicollian and J. R. Brews, “MOS (Metal Oxide Semiconductor) Physics and Technology,” 1982.
[12] C. H. Chang and J. G. Hwu, “Reliability of Low Temperature Processing Hafnium Oxide Gate Dielectrics Prepared by Cost-effective Nitric Acid Oxidation (ANO) Technique,” IEEE Transactions on Device and Materials Reliability, vol. 7, No. 4, pp. 611-616, Dec. 2007.
[13] R. S. Lysaght, B. Foran, G Bersuker, R. Tichy, L. Larson, R. W. Murti and H. R. Huff, “Physical Characterization of High-k Gate Dielectric Film Systems Processed by RTA and Spike Anneal,” 10th IEEE International Conference on Advanced Thermal Processing of Semiconductors – RTP 2002.
[14] C. H. Chang and J. G. Hwu, “Low Temperature (Tmax = 380℃) Ultra-thin Hafnium Oxide Stacks with Terraced Structures on A Single Wafer by Sputtering of Hf Metal on Tiled Substrate Followed by Nitric Acid Oxidation,” Proceedings of International Electronic Devices and Materials Symposium, National Tsing-Hua University, Hsinchu, Taiwan, Republic of China, Dec. 2007.
[15] C. H. Chang, L. S. Lee, M. J. Tsai and J. G. Hwu, “Electrical Characteristics of High-k HfO2 Gate Dielectrics Prepared by Oxidation in HNO3¬ Followed by Rapid Thermal Annealing in N2,” International Electronic Devices and Materials Symposium, pp. 95-98, December 20-23, Shin-Chu, Taiwan, Republic of China, Dec. 2004.
[16] C. C. Ting and J. G. Hwu, “Characteristics of Ultra-thin Gate Oxides (~3nm) Prepared by Anodization in Deionized Water and Then Followed by High Temperature Anneal,” Proceedings of Electronics and Materials Symposium, pp. 37-40, Taoyuan, Taiwan, Republic of China, Dec. 1999.
[17] Y. P. Lin, Z. H. Chen, and J. G. Hwu, “SiO2/Si Suboxide Characteristics of Ultra-Thin Gate Oxides Prepared by Room Temperature Anodic Oxidation and Rapid Thermal Oxidation,” International Conference on Solid State Devices and Materials, pp. 708-709, Nagoya Congress Center, Tokyo, Sep. 2002.
[18] J. R. Hauser and K. Ahmed, “Charaterization of Ultra-thin Oxides Using Electrical C-V and I-V Measurement,” AIP Conf. Proc. 449, 1998, pp. 235-239.
[19] H. T. Lue, C. Y. Liu and T. Y. Tseng, “An improved two-frequency method of capacitance measurement for SrTiO3 as high-k gate dielectric,” IEEE Electron Device Lett., vol. 23, pp. 553-555, Sep. 2002.
[20] K. J. Yang and C. Hu, “MOS Capacitance Measurements for High-Leakage Thin Dielectrics” IEEE Trans. Electron Devices, vol. 46, pp. 1500-1501, July 1999.
[21] A. Nara, N. Yasuda, H. Satake, and A. Toriumi, “Applicability Limits of the Two-frequency Capacitance Measurement Technique for the Thickness Extraction of Ultrathin Gate Oxide,” IEEE Trans. Semiconduct. Manufact., vol. 15, pp. 209-213, May 2002.
[22] S. –H. Lo, D. A. Buchanan, Y. Taur, and W. Wang, “Quantum Mechanical Modeling of Electron Tunneling Current from the Inversion Layer of Ultra-thin-oxide nMOSFET’s,” IEEE Electron Device Lett., vol. 18, pp. 209-211, May 1997.
[23] H. P. Lin and J. G. Hwu, “Analysis of Constitution and Characteristics of Lateral Nonuniformity Effects of MOS Devices Using QM-based Terman Method,” IEEE Trans. Electron Devices, vol. 54, No. 11, pp. 3064-3070, Nov. 2007.
[24] S. W. Huang and J. G. Hwu, “Indication of Lateral Nonuniformity of Effective Oxide Charges in High-k Gate Dielectrics by Terman’s Method,” Electrochemical Society Transaction-Physics and Technology of High-k Gate Dielectric III, Vol. 1, Issue 5, pp. 789-796, Jan. 2006.
[25] C. C. Hong, W. R. Chen and J. G. Hwu, “Local Thinning-Induced Oxide Nonuniformity Effect on the Tunneling Current of Ultrathin Gate Oxide,” Japanese Journal of Applied Physics, vol. 41, Part 1, No. 41, pp. 1-4, Jan. 2002.
[26] M. Houssa, T. Nigam, P. W. Mertens and M. M. Heyns, “Model for the Current-voltage Characteristics of Ultrathin Gate Oxides after Soft Breakdown,” J. Appl. Phys., vol. 84, pp. 4351-4355, Oct. 1998.
[27] M. Houssa, J. L. Autran, M. M. Heyns, A. Stesmans, “Model for Defect Generation at the (100) Si/SiO2 Interface During Electron Injection in MOS Structures,” Applied Surface Science 212-213 (2003) 749-752.
[28] M. Houssa, V. V. Afanas’ev, A. Stesmans and M. M. Heyns, “Defect Generation in Si/SiO2/ZrO2/TiN Structures : The possible Role of Hydrogen,” Semicond. Sci. Technol. 16 (2001) L93-L96.
[29] Y. Shi, X. Wang and T. P. Ma, “Tunneling Leakage Current in Ultrathin (<4 nm) Nitride/Oxide Stack Dielectrics,” IEEE Electron Device Lett., vol. 19, no. 10, pp. 388-390, Oct. 1998.
[30] R. Jha, J. Gurganos, Y. H. Kim, R. Choi, J. Lee and V. Misra, “A capacitance Based Methodology for Work Function Extraction of Metals on High-k,” IEEE Electron Device Lett., vol. 25, no. 6, June 2004.
[31] Y. T. Hou, M. F. Li, H. Y. Yu and D. L. Kwong, “Modeling of Tunneling Currents Through HfO2 and (HfO2)x(Al2O3)1-x Gate Stacks,” IEEE Electron Device Lett., vol. 24, no. 2, Feb. 2003.
[32] A. Teramoto, K. Kobayashi, Y. Ohno and A. Shigetomi, “Excess Current Induced by Hot Hole Injection and FN Electron Injection in Thin SiO2 Films,” IEEE Trans. Electon Devices, vol. 48, no. 5, May 2001.
[33] C. S. Park, B. J. Cho and D. L. Kwong, “Thermally Stable Fully Silicided Hf-Silicide Metal-Gate Electrode,” IEEE Electron Device Lett., vol. 25, no. 6, June 2004.
[34] G. Shang, P. W. Peacock and J. Roberson, “Stability and Band Offsets of Nitrogenated High-Dielectric-Constant Gate Oxides,” Appl. Phys. Lett., vol. 84, no. 1, pp. 106-107, Jan. 2004.
[35] C. S. Kang, H. J. Cho, K. Onishi, R. Nieh, R. Choi, S. Gopalan, S. Krishnan, J. H. Han, and J. C. Lee, “Bonding states and electrical properties of ultrathin HfOxNy gate dielectrcs,” Appl. Phys. Lett., vol. 81, no. 14, pp. 2593-2595, Sep. 2002.
[36] D. J. Dimaria, E. Cartier, and D. Arnold, “Impact ionization, trap creation, and breakdown in silicon dioxide films on silicon,” J. Appl. Phys., vol. 73, no. 7, April 1993.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/43305-
dc.description.abstract等效氧化層厚度(EOT)通常由內含四個假設的元件參數在雙頻率電容量測下推導得出。然而, 等效氧化層厚度只是不包含有任何元件不均勻特性的有效數值。在文章中,不均勻特性將經由分析深空乏區的電壓電容(C-V)曲線而取得。當我們細察由電容電壓曲線轉換而得的表面電壓對閘極電壓( )曲線,可發現曲線斜率與理論值有所偏差。藉由不均勻假設以及引入適當的均勻度參數修改轉換公式,深空乏區的電容電壓曲線可獲得很好的模擬。因此,每個元件獨有的均勻度參數將可取得,並得以利用參數的數值分析元件的不均勻程度。在此同時,可指標與不均勻程度相消長的均勻度參數 也被定義。
至於電流電壓曲線,經由多種不同元件面積等條件及崩潰特性分析來觀察以二氧化矽及有初始界面氧化層和沒有初始界面氧化層的二氧化鉿等材料做為介電層的電容元件的不同機制,結果發現雖然高介電係數材料比傳統材料二氧化矽擁有較佳阻遏漏電流的能力,二氧化鉿介電層明顯較二氧化矽材料對實驗條件敏感。並且介於基板及二氧化鉿層之間初始界面氧化層的重要性也不容忽視。結論是對於發展對高介電係數材料的良好運用依然有許多研究空間。
zh_TW
dc.description.abstractThe EOTs are always derived from two frequency method of capacitance measurement with four parameters. However, the EOT is just the effective value excluding any message about nonuniformity characterization of devices. In this work, the characteristic of nonuniformity was extracted by the analysis of CV curve in deep depletion region. While examining the curve transformed from C-V curve, we would find the slope deviates from the theoretical value. By modifying the transforming equations with the nonuniformity model and the injection of proper uniformity factor, the C-V curve in deep depletion would be fitted well. As a result, the uniformity factor for every definite device would be found out, and we would take advantage of the factor to analyze the nonuniformity characteristic. In addition, the uniformity parameter which could index the degree of nonuniformity was also defined.
As to the I-V curves, the conditions of breakdown and various device areas were all examined to observe the mechanism differences between SiO2 and HfO2 with and without initial SiO2 dielectric layer MOS capacitors. As a result, even the high-k material would have better ability to restrain leakage current than conventional dielectric material, SiO2, the HfO2 dielectric layer is more sensitive to experimental conditions than that of SiO2 evidently. And the importance of the initial SiO2 between the substrate and HfO2 layer is also obvious. As a conclusion, there is till a lot of space to find and develop the ways to take good advantage of high-k material as dielectric layer.
en
dc.description.provenanceMade available in DSpace on 2021-06-15T01:48:27Z (GMT). No. of bitstreams: 1
ntu-98-R96943062-1.pdf: 2260166 bytes, checksum: 0ad6776a097a238e1e1d926bb4f93a2b (MD5)
Previous issue date: 2009
en
dc.description.tableofcontentsAbstract (Chinese) I
Abstract (English) II
Contents….. III
Table Captions IV
Figure Captions V
Chapter 1 Introduction 1
1-1 Motivation of this work 1
1-2 Capacitance-voltage curve 4
1-3 Experimental process and measurement systems 6
Chapter 2 Nonuniformity Charaterization of MOS Structure with HfO2 Dielectric Layer Based on CV Measurement in Deep Depletion 16
2-1 Introduction 17
2-2 Deep depletion characterization and analysis 18
2-3 Theoretical analysis 19
2-3-1 Ideal theory 19
2-3-2 Modified theory considering nonuniform characteristics 21
2-3-3 Sample fitting and discussion 23
2-4 Summary 25
Chapter 3 Comparison of Characterization between High-k HfO2 and SiO2 Dielectric Layers 35
3-1 Introduction 36
3-2 Capacitance-voltage characterization comparison 37
3-2-1 Nonuniformity 37
3-2-2 Various device areas 38
3-3 Current-voltage characterization comparison 39
3-3-1 Various device areas 39
3-3-2 Breakdown 41
3-4 Importance of initial SiO2 layer for high-k HfO2 dielectric layer 43
3-5 Summary 44
Chapter 4 Conclusions and Future Work 53
4-1 Conclusions 53
4-2 Suggestions for future work 54
References... 55
dc.language.isoen
dc.subject二氧化鉿zh_TW
dc.subject不均勻性zh_TW
dc.subject高介電係數zh_TW
dc.subject金氧半電容zh_TW
dc.subject深空乏區zh_TW
dc.subjecthigh-ken
dc.subjectNonuniformityen
dc.subjectHfO2en
dc.subjectdeep depletionen
dc.subjectMOS capacitoren
dc.title高介電係數氧化鉿閘極介電層金氧半電容元件之不均勻特性分析zh_TW
dc.titleAnalysis of Nonuniformity Characterization for MOS Structure Device with High-k HfO2 Dielectric Layeen
dc.typeThesis
dc.date.schoolyear97-2
dc.description.degree碩士
dc.contributor.oralexamcommittee毛明華(Ming-Hua Mao),郭宇軒,林致廷
dc.subject.keyword不均勻性,高介電係數,金氧半電容,深空乏區,二氧化鉿,zh_TW
dc.subject.keywordNonuniformity,high-k,MOS capacitor,deep depletion,HfO2,en
dc.relation.page58
dc.rights.note有償授權
dc.date.accepted2009-07-07
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電子工程學研究所zh_TW
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